Whether intended or not, I am receiving bad service

[Euler's_Identity]

An analog multiplexer takes binary coded input (# of bits>1) and yields analog input/outputs (bidirectional).   An analog switch is just a switch with a single bit binary/logic level input.   Analog switch integrated circuits do not contain a decoding section, as they only have single control lines, but several switches could have ganged control lines.

For example, see the cd4066 analog switch IC, as opposed to the cd4067 multiplexer.   It would take four 4066's and several gates to create one 4067.  Hopefully this explains where I'm coming from. 

Anyway, I'm still going to model the 4067, as the price of the 406 is too much.  Yes, I agree it has more features, but they're features I don't need and won't buy.  (Simulating with the 406 could be beneficial for troubleshooting Multisim though, if I had loads of time that is.)

[Euler's_Identity]

What I need now is good models for 4000 series P-channel and N-channel MOSFETs with unconnected substrates.   Given these two models, I can build a cd4066, gates, and, therefore, the 4067.   😉

...but don't use a hierarchical block this time...

 

[lacy]

O.K. I understand now what you mean about the decoding. You want to be able to select more than one output at a time and put the input on those lines.

As far as the 4066 is concerned, Multisim does have this IC under the CMOS category. I don't know if this is suitable for what you are going to do, but it would save you the trouble of modeling 2 different IC's. You can check it out and see if it meets your requirement.

Always a pleasure to "talk" with you.

Have A Nice Day

[Euler's_Identity]

Lacy,

Egads!  You're right!  The cd4066 is available.  I'm sorry for the mistake.

I  find it odd your usage of the term "output" with respect to an analog multiplexer.  There is no output, only input/output(s).  The same line that was an input at one time could be an output later.  In fact, the lower the Ron of the particular analog switch, the more it looks like a wire between input/output and output/input.

In the hierarchical block you'll see 16 analog switches in parallel but not connected to each other.  Each analog switch, technically, has an analog input and output, but those pins are actually input/outputs, because direction doesn't matter -- it's a switch.  Then, each analog switch has its own individual control line.  The control lines are the outputs of a binary to decimal decoder built from gates.  Given four bits, this allows individual addressing of 16 analog switches.

I wanted a 1:50 multiplexer, but I didn't have one, so I made one by tying together the input/outputs on one side of these addressed switch banks.  I now had a single pole 50 throw switch (I only wired 16), and each switch was addressed (0d-49d, with address 50 and higher being invalid.)

    

[lacy]

My terminology my be unconventional, but with this particular IC (ADG I am referring to). I am looking at it from left to right. Input on left and Output on right. I know that either one could be inputs or outputs, but it helps me keep it straight in my mind by thinking of it in this manner. That is why I said your could run the input signal into the output and take it off the input lines 0-16.

I don't mean to confuse anyone but this is just the way I remember which end of the IC I am running my signals to in this particular situation.

Have A Nice Day

[lacy]

To clarify my last statement in my previous post. This is they I keep it straight in my mind as to the direction of signal flow. Out to in or in to out. Right to left or left to right. Just thought I would make that distiction.

[Euler's_Identity]

Lacy,

This is mainly to you, as you've helped me the most throughout my latest Multisim snag, but I post it here in case others are interested.

I'm giving it another go trying to build a couple of power transistor models.  I tried it near a year ago and they didn't work (electronically) correctly.  Hence, on the off-chance I missed something, I'm trying again.  (Yes, I followed the tutorial, and yes, I built the TI programmable gain amp.  Likewise, I, as it's been so long, don't remember much of any of it.)

While reading the help stuff here at the site, I ran across something that may have some bearing on that multiplexer circuit.  Check this out:

"Layout-Only Components

Layout-only components do not contribute to a simulation. They have no associated SPICE, VHDL, or behavior model. When connected parallel to the circuit, they will have no impact on the simulation. When connected in series, they will create an open circuit. Layout-only components are green on the Multisim or Multicap environment.  An example of a Layout-only component is a connector."

(Emphasis mine)

A key piece of that design is the connector, as that is how the current source feeds the extrernal board and how the external board sends current back to the current sink.  (Notice, that's a series circuit.)  However, based on the text quoted above, inserting that connector opens the current path!  Granted, throughout the troubleshooting, I never got the impression that current wasn't flowing, but maybe this 'insert connector=open the circuit' could be playing a role in the puzzling reactions from Multisim.

Anyway, as you've been of so much help, I thought I'd take a minute and pass that on to you.

Incidentally, changing the subject, have you ever done any transistor modelling by chance?  I'm trying to model the 2n3055/TIP3055 and TIP42.  If successful, I'll try the 2n2955, although my current design isn't calling for it, since it's the 2n3055's complement.
   

[lacy]

What did you tell me one time when I made a post that was obvious. Was it DUH!! I believe I tried to tell you about the connector as being useless for your purpose previously. I may not have explained it very well (usually I get to the point but take the long path to it) and it may not have registered at the time, but this was exactly what I was trying to get you to see.

As far as the connector goes, until something is placed into it it is an open circuit(in reality because the simulator don't let you plug anything into them). I believe you were putting a resistor across it to simlate a load, but that still didn't seem to help. So I don't know if the connector is doing something to it not. With the load resistor in place you are bypassing the connector with the resistor so if it was going to work the way you wanted then that should have done the trick. I don't know if you were using just one resistor on one line and then running the test or not. Maybe you could try to run resistors across all the pins and see what happens.

As far as creating transistors from the component wizard, I have found that to be a very complicated process. I tried to do it one time and got fustrated with it and gave up. My problem with it was the fact that most of the parameters you have to enter are not listed in the text portion of the datasheet, but from the characteristic graphs. Most of the time these graphs in the datasheet are hard to read and the numbers on the graph are spaced out to where you have to guess at the numbers for you particualr parameter you are trying to enter. I may just not be reading them correctly, but after a while I figured it was easier to find the models on the web and do it that way.

[Euler's_Identity]

Lacy,

I think this transistor modelling deserves a new thread, so I'm going to start one. 

[lacy]

As an addition to my last message about the multiplexer. This is going to sound complicated and, since I don't have access to information about the board you are testing, is just a theory to run past you.

You could possibly build the board you are testing on a separate schematic (mult-page) and use the off-page connectors to mimic the real connector you are using. What this does is basically hook up the board under test into the schematic directly but on a separate piece of paper so to speak. This way you have a working board passing signals to and from you multiplexer circuit This is just a thought and I don't know if it would be feasible or not. I thought I would just let you examine this theory and let you do what you want with it.