Why doesn't PLD component CNTR_BCD_SDC work as a VHDL component?

[smwmsoe]

I have been using Multism 11 to generate VHDL files for programming a Xilinx FPGA.

The PLD component CNTR_BCD_SDC does not work as a VHDL component on the Xilinx FPGA. I have compiled a bit file and programmed the FPGA with it. This counter will not count.

I have tested the other counters in this PLD component library such as CNTR_BCD_S. They do work as counters on the Xilinx FPGA.

[Fernando_D]

Hello,

Thanks for reporting this. We are running some tests to see if we can reproduce the issue.

We'll get back to you soon.

Regards,

[yyao]

Hi there,

Sorry for the delay in response. I took a look at the CNTR_BCD_SDC component and created a design which let it count. There's a few things to watch out for when working with this component:

1. Is the other clock held high when you are toggling UP or DOWN? The documentation to this component indicates that you need to hold UP high while toggling DOWN, or conversely, hold DOWN high while toggling UP. Failure to do so will result in a counter that doesn't count properly.
2. Are your clock sources debounced? If you are driving the UP or DOWN signal of this component with a switch or button, chances are, you are getting a bouncing signal from the mechanical swtiching action. Use a counter or a SR latch to eliminate this.
3. Are you driving the UP or DOWN signal with a combinatorial logic block? You might be transitioning between states of this logic block that contain glitches. If this is the case, either reassign your states or register the output.

I did find a problem during the testing of this component. For some reason, after it starts counting down, it never would count up agian. We're currently investigating why this is. However, if you require this component to only count UP or only count down, throughout the lifetime of you design, it will still work fine. I'm not sure if this is the problem which you ran into, but it doesn't sound like it.

I'm attached a simple test circuit which you can interact with to make the CNTR_BCD_SDC count up. Simply press the BTN0 and BTN1 in alternating sequence to make the counter go up.

If you have any questions, please post them here and I'll be glad to answer them.