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edge detection ckt

Hi guys,

 

I'm new to NI Multisim environment, I was wondering if I could design the below mentioned ckts and get the same (delayed) outputs. If you are reading this plz do reply ASAP.

 

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All logic models in Multisim contain non-zero delays. So if you wire your circuit as shown, it should produce a pulse as shown.

 

You can modify the delays by editting the model of the component (Properties dialog>>Value tab>>Edit model button)

 

Unless you are trying to simulate logic gates which you can directly purchase in discrete form (such 4009BD), I suggest you stick to components under "Misc Digital" group, and under the "TIL" family.

 

 

Max
National Instruments
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MaxNI, It doesnt seem to be working, I cant seem to see any delay in the logic analyzer...

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please share your circuit

Max
National Instruments
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