12-31-2019 12:48 AM
Hi All, i know my query is out of scope of this labview community but can you please guide me that if i want to implement basic receiver/ spectrum monitoring (like in my attached vi) using verilog code in fpga based SDR than how can i do this?? Help in this context will be highly appreciated
06-03-2020
08:40 AM
- last edited on
10-17-2025
08:46 PM
by
Content Cleaner
Hello naumanhabib,
Have you seen those pages?
https://knowledge.ni.com/KnowledgeArticleDetails?id=kA00Z000000kHGXSA2&l=en-US
https://knowledge.ni.com/KnowledgeArticleDetails?id=kA03q000000x4TyCAI&l=en-US
https://forums.ni.com/t5/LabVIEW/How-to-import-Verilog-codes-into-LabVIEW-FPGA/td-p/2201720