This code implements the SHA 256 hashing algorithm in LabVIEW FPGA. The implementation is compatible with placing the IP within a Single-Cycle Timed Loop (SCTL).
The IP also doesn't completely conform to the SHA 256 algorithm, and here are the limitations/constraints:
- Hash input must be at least 4 bytes
- Hash input must be a multiple of 4 bytes
- Hash input must be less than 2^31-1 bits long
Systems Engineer
SISU
