FPGA编译代码错误
各位高手，请问下我在FPGA编译时，出现如下错误代码信息，请问是什么意思。
ERROR:HDLCompiler:1728 - "D:\NIFPGA\jobs\Ug94Fmm_eW1lGl4\NiFpgaAG_00000034_SequenceFrame.vhd" Line 303: Type error near s_reset_8548_2 ; current type std_logic_vector; expected type std_logic
INFO:TclTasksC:1850 - process run : Synthesize - XST is done.
ERROR:HDLCompiler:1728 - "D:\NIFPGA\jobs\Ug94Fmm_eW1lGl4\NiFpgaAG_00000034_SequenceFrame.vhd" Line 313: Type error near reset ; current type std_logic; expected type std_logic_vector
WARNING:HDLCompiler:439 - "D:\NIFPGA\jobs\Ug94Fmm_eW1lGl4\NiFpgaAG_00000034_SequenceFrame.vhd" Line 313: Formal port eiosignal of mode out cannot be associated with actual port reset of mode in
ERROR:HDLCompiler:100 - "D:\NIFPGA\jobs\Ug94Fmm_eW1lGl4\NiFpgaAG_00000034_SequenceFrame.vhd" Line 313: reset with mode 'in' cannot be updated
ERROR:HDLCompiler:854 - "D:\NIFPGA\jobs\Ug94Fmm_eW1lGl4\NiFpgaAG_00000034_SequenceFrame.vhd" Line 246: Unit <vhdl_labview> ignored due to previous errors.
VHDL file D:\NIFPGA\jobs\Ug94Fmm_eW1lGl4\NiFpgaAG_00000034_SequenceFrame.vhd ignored due to errors
