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Engine Simulation Custom Device Feedback

it was certainly the global. in the crank loop you were using the shipping global but everywhere else (including the APU) you were using your own global. so the crank loop would have always seen a value of 0 since the APU wasn't writing to that global

Stephen B
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Message 111 of 247
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Hi ,

I'm having some problems in veristand with the NI AES HIL Addon. I have made no changes to the code apart from assigning ports to the i/ps and o/ps.
IC8 and FI8 angle durations both read 0 in veristand even though the start times and end times look ok. The start-end delta is 36 degrees but FI8/IC8 both

read 0. See image below of the veristand screen.

IC8_Reads_0.jpg

I already tried recompiling the FPGA code again and loading a new bitfile into veristand to no avail. I can't see any differences in the lab view code between FI8/IC8 and all the other FI/IC values.
1-7 FI/IC angle durations work great reporting 36 degrees as expected.

Note the IC8 time duration works fine, its just the angle duration thats stuck at 0.

Bitfile and VI attached.

thanks.

James

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Message 112 of 247
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Hey James,

I found the issue. Apparently our template doesn't wire that indicator up! I updated the known issues list so I can fix it in the next version.

Untitled.png

Sorry about that

Stephen B
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Message 113 of 247
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Easy fix, thanks Stephen.

James

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Message 114 of 247
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Hi,

I created a new sub VI to detect the falling-Rising time ( all measurements) delta for the fuel injectors. ( current one just measures Rising-Falling Delta)

I made a copy of "AES ECU Event Measurement - All Measurements.vi" and called it ;

"AES ECU Event Measurement - All Measurements Falling Edge.vi"

I added it to the library by opening AES FPGA.lvlib and selecting ADD--> File.

I Replaced the original FI subvi in the main vi by using replace --> All pallets --> select VI.

Everything compiled ok and i imported the bitfile into veristand. I'm running a 7854R.

In veristand only some of the ECU events are visible, see attached power point.

"Only FI 2 + 3 Time duration , FI8 End angle available for FI."

Is there some step I've missed or overlooked?

Do i need to add my new VI as a polymorphic option of AES ECU Event Measurement?

thanks,

James.

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Message 115 of 247
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update to above comment "Apr 30, 2013 12:45 PM"

I also tried adding "AES ECU Event Measurement - All Measurements Falling Edge.vi" as a polymorphic option of "AES ECU Event Measurement"

This did not fix the issue.

James.

AES ECU Event Measurement Modified.jpg

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Message 116 of 247
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More info for  issue:

114. Apr 30, 2013 12:45 PM

115. Apr 30, 2013 1:16 PM

Attachment 1:

C:\Documents and Settings\All Users\Documents\National Instruments\NI VeriStand 2012\Custom Devices\Engine Simulation

Attachment 2:

Labview project

Attachment 3:

C:\Program Files\National Instruments\LabVIEW 2012\user.lib\AES\FPGA\FPGA VIs

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Message 117 of 247
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Hey Jamesy,

I haven't looked at your attachments, but I can tell you the issue has to do with your indicator naming or data types (and nothing else). Only indicators matching the name pattern published here: https://decibel.ni.com/content/docs/DOC-19122#ECU_Event_Loops__Optional

will be used by the custom device.

Stephen B
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Message 118 of 247
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Hi Stephen,

The Fuel injector indicator names and data types are the same as the original VI and only 3 of them show up in veristand.

The only change i made to FI was to use the "FE" ( Falling edge) VI instance that i created.

I also added 2 new sets of sensors and none of them showed up in veristand .( they have different component names though which is desirable for testing)

I've now added all VIs, bitfiles etc.

thanks,

James.

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Message 119 of 247
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Hi James,

In this case, it's the FPGA XML that's being parsed to generate the channel names in VeriStand- you may need to update this as well.  The project you've provided hasn't cleared the virus scanner yet, so I can't open the file to take a look, but that's where I would focus my efforts.  For more information on the required syntax, refer to this help document:

VeriStand Help:Creating a Custom FPGA Configuration File

http://zone.ni.com/reference/en-XX/help/372846F-01/veristandmerge/creating_custom_fpga_configuration...

Regards,

Tom

Tom L.
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Message 120 of 247
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