Engine Simulation Custom Device Feedback

[StephenB]

jamesy wrote:

My chassis is a NI-1036dc ,with a NI PXI-8360 MXI express card. Would the fact I'm not using an "express" chassis make any difference?

James

No it shouldn't

[StephenB]

Good news. I found time and diagnosed the performance issues inside the custom device and eliminated them. It was easier than I expected. In my testing I saw over 50% increased performance with the newest version, 3.7, that I just uploaded.

Execution duration with the example bitfile running on an 8108 controller with version 3.7:

Execution duration with the example bitfile running on an 8108 controller with version 3.6:

Also note that the custom device performance will no longer be sensitive to how many controls or indicators are on your FPGA VI. The performance will simply linearly scale with however many channels are present under the Engine Simulation Custom Device.

So for example, if your FPGA bitfile has the "all data" event VI in for 8 cylinders for IC and for FI, then you will have 4 * 8 * 2 channels (64) added for the event information under the custom device by default. You can then improve performance, if you don't need all that data, by right clicking the sections inside system explorer to remove some of these channels.

[jamesy]

Excellent, I'll try this out.

James.

[jamesy]

Hi Stephen,

I reverted back to an older known good bitfile to debug my test setup. When i deploy i get the following error ( see screenshot )

Can you give me some hints what the problem might be based on the error code.

I used this bit file a few weeks ago without any errors.

The ony difference now is that its stored in a  different folder. ( along with all related files )

James.

[ToddK]

Hi James,

I had similar problems when changing bitfiles.  Please see my solution posted to this thread back in May 2012.

Todd

"The Engine Simulation Custom Device only reads/updates the name of the *lvbitx file from the associated *.fpgaconfig file when Adding it to the system definition for the first time. This is performed by the "Custom Device, Engine Simulation Initialization VI". Any time you change the fpgaconfig file name, the new lvbitx file is not updated to the System Definition file.

Option #1: Delete the Engine Simulation Custom Device from the System Definition and then Add back, requiring any reconfiguring of System Mappings.

Option #2: Edit the System Definition File *.nivssdf, to manually update the “Dependent File Type” and “RTDestination” paths to point to the updated *.lvbitx file names."

[StephenB]

Thanks Todd!

[jamesy]

I moved the bit file back to the location where the original was stored. This solved the issue.

I was adding the custom device each time. the issue was still present. For some reason veristand didnt like the fact i moved the bitfile to a new location.

James.

[Merc_Bert]

I just re-downloaded the latest AES and it looks like the wires in there for the FI 8.Angle Duration and IC 8.Angle Duration are still broken.  Just wanted to drop a reminder that they needed to be fixed.

[jamesy]

Hi Stephen,

I'm having some problems with the TDC Crank settings in veristand. There seems to be a few issues here.

My ECU calculates TDC as "First rising egde after a missing tooth is detected - offset(283 degrees).

Trying to control the rising edge in veristand is proving to be tricky. The wave forms created by veristand sometimes do not match the settings.

I had to use an unexpected setting at achieve 1 degree accuracy.

I think there might be a rounding error and some other bugs in the Labview code that converts the settings into the waveform.

See the attached presentation.

If i could remove the 1 degree error from my TDC ref then i would be happy.

thanks,

James.

[StephenB]

Hi Jamesy,

Great question and awesome data. Thank you for capturing the problem so well.

I'm looking into this and will get back to you asap.