VeriStand Steps for TestStand Feedback

[User002]

Hey Stephen!

We have been busy on a few things lately, so this isn't on the calendar.  It will take a couple days of work to rebuild everything and test it all, and that can happen once 2015 is released.  That is with the current functionality of course - we were hoping to add features, but haven't had much time for that yet.  For you, though, we should be able to make time at least to build the new version.  When are you hoping to have it by?

Andrew

[StephenB]

Hey Andy!

Thanks for the prompt response.

To be honest, I am in the unfortunate situation of having to use the NIVS 2015 beta right now because we ordered 9035s for a test system. Technically we aren't really on the NIVS 2015 beta anymore, as XNET didn't work, so Olivia gave us much later builds of the Driver DVD (probably RTM?) and last Friday's build of NIVS 2015 (which I think uses the LV 2015 RTM run time engine). That fixed XNET.

We were planning on automating tests with NI TestStand but clearly that wont be possible without this library built for 2015, so I'm just testing the waters here to get a schedule so we can plan accordingly. If you could get a build with NIVS 2015 assemblies going, that would be awesome. If we have to wait month+ we will go explore other avenues of automating.

Take care,

[Z4CRUZN]

Hello everyone,

     I noticed a small problem in the Teststand/Veristand Addon, and I thought I would post the error and the solution here. I am sure that someone else has, or will get hit with this one. For all of the specific Veristand Limit tests that get added to Teststand once the addon is installed, it will always adds a "Description" line to the report output (this seems to be the default state). The generic Limits tests in Teststand, do not do this. It took me a long time to figure out how to turn this off, on the Veristand limit tests, so that they look the same when in a report as the more generic limits tests appear. The enclosed pic shows how to turn this off. You basically click on each Veristand Limit test step, and go to the "Property Browser" under the "Properties" tab. In the resulting menu tree, drill down to Result -> Veristand -> Description. Then right click on the Description, and go to "Advanced" -> "Edit Flags". This will bring up a picture as enclosed. Then uncheck the "Include in Report" option. Hope this helps...

[JeKo]

Hi,

We would like to deploy and play an RT Sequence directly from TestStand, but the data types we can pass as a parameter seems to be limited to scalar data types and path (channel).

Is there a way to call a sequence which has an array as parameter?

We know how to do it from LabVIEW (Waveform Player Example.vi shows it pretty well), but we can not find a way to do it directly from TestStand using the steps.

Are we missing something or we have to do a LabVIEW wrapper to call such sequence?

[CFBotha]

Good day

I have some problems adding hardware to veristand. I have used the custom fpga template and then I used the FPGA configuration Editor to set the xml file up. I got everthing in to veristand, but for some reason veristand is waiting for a IRQ that, it does not recieve and then times out. This happens when I want to run the veristand.

"" The wait on IRQ method timed out before the specified interrupt was received"" Error 61060.

Can you please send me in the right direction for fixing this?

[User002]

Z4CRUZN -

      Thanks for the feedback.  We'll see what we can do about getting that into the next version.

JeKo -

      That is an interesting bug.  You might try using putting  str()  around a local variable name.  That may work, but I haven't had time to test it for you.  It's NIWeek this week so as you would expect things have been a bit busy.  Let me know if that works and if not I'll see what I can do.

CFBotha -

     The template contains a couple of IRQs that fire so that the VeriStand engine can stay in sync with it during configuration.  If these are removed, it will throw that error.  It can also throw that error if the number of channels in the bitfile don't match the number in the XML.  What happens there is the bitfile is waiting for more channels instead of acknowledging the IRQ and continuing to the next iteration.

If the problem isn't very apparent, the best place for this post would be the VeriStand discussion forums here:

http://forums.ni.com/t5/NI-VeriStand/bd-p/440

There, more people watch and respond so you're more likely to get timely help.  Post your code if you can, and we'll try to help you there.

Thanks,

Andrew

[Jagardel]

Hello,

I am currently using LabVIEW 2015 and VeriStand 2015 with TestStand 2014 and the VeriStand steps for TestStand plugin does not seem to allow connection. The error message seems to imply that the plugin is searching for VeriStand 2014 instead of VeriStand 2015. Is it possible to make the plugin work with this configuration?

[User002]

Jagardel,

Great question.  Right now your version is trying to call the 2014 version of the assemblies.  We are working on updating things for a 2015 version.  We were hoping for it to be done in the next couple of weeks. I'm not sure what the latest is because I've been busy on other things - we are sometimes subject to other projects interrupting our work on these.  Will that work for your timeline?

Thanks,

Andrew

[Jagardel]

Hello Andrew,

Great to hear that you are already working on it! Is it possible for you to give a more specific date of when the new plugin will be ready? We are working on tight timescales and we would like to know whether we can build our VeriStand work in 2015 version.

Thanks in advance!

Jagardel

[rbenji23]

I would also like to migrate to Veristand 2015 but cannot until these steps are ready since it is an integral part of our test setup.

Also, great work! I would love to see these rolled into the official release of Veristand or Teststand!