Hello team,
I had a questions regarding the jitter of the DIO output on the PXI-6570 instrument.
The datasheet specifies the following:
1.
|
Vector period resolution
|
38 fs
|
2.
|
Edge placement resolution
|
39.0625 ps
|
3.
|
Edge Multiplier = 1x
|
±500 ps, warranted
|
My application requires me to output a 50% Duty cycle 100MHz clock on the DIO. Please could you provide the jitter spec for this output and explain how it would relate to the above three already mentioned specs.
Thanks,
Sushrut
