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PXIe-4461 using chasis PXI CLK10 as reference clock

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Hello,
I'm working with a PXIe-1062q Chasis and a PXIe-4461 ADC. I'm trying to sample a senoidal signal.
In Labview I9m using an example VI call "Continuos Output.vi". In this VI i'm having problems when i want to configure the reference clock, in the option "Timing Settings"

 

Timing error Labview.jpg

 


When I use the 4461 with his own board clock, the option "OnBoard Clock", the sampling it´s ok. But when I change for any option, for example "PXI_Clk10" (that's the clock of the backplane), ocurrs an error that I can't understand and I can't find in the NI page.

 

Timing error Labview 2.jpg

 

In the NI MAX the chasis and the 4461 are ok.
Thanks for your help, regards from Argentina.

  



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Message 1 of 6
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  1. You're selecting the sample clock in the Timing Settings section and not the reference clock, leave the sample clock as OnboardClock
    santo_13_0-1618440851894.png
  2. If you would like to configure the Reference clock, this example does not configure the reference clock and hence you need to add the following snippet to the example
    santo_13_1-1618440969481.png

     

  3. Note, you are using a PXIe chassis and a PXIe instrument, so the reference clock cannot be PXI_CLK10 but instead it should only be PXIe_CLK100 (type it in, you may not be able to select from drop-down)
Santhosh
Soliton Technologies

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santo_13, thank you very much for your response.

I've made the changes that you proposed to me. I've received the following error

 

CLK100 error.jpg

I would appreciate if you send your ideas about the causes of this problem.

 

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Solution
Accepted by topic author LDParg

Just based on the 'SourceDevice' field, I assume that you've installed the 4461 on slot2 which is PXI only.

santo_13_0-1618526626914.png

In this case, the reference clock has to be 'PXI_CLK10' and clk rate be 10MHz.

 

Santhosh
Soliton Technologies

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It works! I'll change the ADC to the slot 5 and I'll probe the Pxie_Clk100 chasis reference. Thanks for the help!!!

I ask you one more question:

 

How can i set up the reference clock in the DAQ PXIe-6733? I have this device en the same PXI Chasis than the 6674t and the 4461.

 

I saw in the manual that i have to use the RTSI bus. In that case, the pag 14 of the 6733 manual says that the RTSI Clock is the PXI trigger (7) bus.

 

LDParg_0-1618603099047.png

 

So, when i try to route the PXI_Clk10 to the PXI_Trig7 (or another PXI_Trig line occurs an error)

 

CLK10 error 6733.jpg

 

CLK10 error 6733 2.jpg

 

 And when I try to set up the time reference of the 6733 in labview occurs other error:

 

LDParg_1-1618603583329.png

Could you help me with this? 
Thank you very much!

 

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Solution
Accepted by topic author LDParg

 

Firstly, santo_13 your help was very important. Thank you very much! 

The question that I've written in this chat was solved.

 

 

Besides, i I've writen another question about the synchronization of the PXIe-6733. I've found the answer in that post 

https://forums.ni.com/t5/PXI/How-can-I-synchronize-clock-on-multiple-PXI-devices/td-p/2222598?profil...

 

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