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PXIe Bandwidth for FPGA

Hi,

I am testing the peer to peer stream bandwidth of PXIe-1082 by using Labview 2018 with an FPGA FlexRIO system. According to Labview 2018 help(https://zone.ni.com/reference/en-XX/help/371599P-01/lvfpgahelp/fpga_creating_fifos/ ), I use PXIe-5785 as writer and PXIe-7976R as reader, representation is I16 and write eight data to FIFO each time.

 

From the PXIe-1082's User Manual, 1082 has 2 GB/s per slot dedicated bandwidth. And according to the introduction of peer to peer streaming(https://www.ni.com/en/support/documentation/supplemental/10/an-introduction-to-peer-to-peer-streamin..., if modules which connect to the same PXIe switch, the streaming path will through the switch only and the modules seems connect to the switch by a x4 PCI Express link. So I plug 5785 and 7976 into slot 3,4 (same switch) and expect bandwidth reach 2 GB/s.

 

However, it only reach about 902 MB/s. Does any chassis backplane setting missing or PXIe switch limitation reaching? Moreover, the bandwidth reduce to about 743 MB/s if I change to slot 2 and 4. But  they seemed both stream through x4 PCI Express link. What is difference of them?

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Peer-to-Peer Streaming document states a minimum of 800MB/s one-way rate. You might be able to achieve more rate if you would use multiple streams (multiple FIFO) for transfer between cards. Since x4 link is used, there could be a chance that you are using only one of it and the rest 3 are available.

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Santhosh
Soliton Technologies

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Thank for your advice.

I tried to build two FIFO on 7976 and 5785 for streaming but the throughout become 453 MB/s each (seems share 902 MB/s).

 

There are some other questions:

Where can I find the PCIe Generation chassis is used(Gen1 or Gen2)?

Where can I find the PCIe switch spec (bandwidth or Gen) chassis is used?

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Should be gen 2 according to PCI switches insides the chassis. 

https://www.broadcom.com/products/pcie-switches-bridges/pcie-switches/pex8612

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