What are upper and lower bounds for latency using the PXIe-8135?

[Ebanflo]

Hi, I was wondering how we can estimate the amount time of time between data being collected by a PXI Chasis to the data being ready to be processed by a PC. We are using the PXIe-8135 controller. Our lab is hoping for <1 ms of latency.

I looked in the user manual and (using Ctrl+F) found that the word "latency" is not in the document. I looked at all instances of the word "delay" and couldn't find what I was looking for. I haven't had time to read the manual in-depth. Any idea how we can estimate the length of this time interval?

[ericg]

Hi Ebanflo,

This is a good question, and the answer depends on a number of factors.

The primary contributor to latency is typically software, especially the OS.  If you're using a general purpose OS like Windows, the OS itself can add several milliseconds of jitter.  If you're using an RTOS, the jitter is typically an order of magnitude lower (measured in tens of microseconds worst-case).

Compared to the OS, the PCIe transaction is typically a small contributor to the overall latency.  If a device is using DMA to write to memory, the latency can be less than one microsecond.  Similarly, if the CPU is reading from the device (e.g. a driver reading a device register using memory-mapped IO), the latency is typically a few microseconds at most.

What OS and PXIe device(s) are you planning to use?