5660 accuracy for hopping signal

[Rashid931]

Hi,

     I think if you use NI PXI-5142 instead of NI PXI-5620, there must be improvement in acquisition time because PXI-5142 is 100 MS/sec and PXI-5620 is 64 MS/sec.

I request to Eric K  and Chris W. that kindly comment on this.

Thanks

RASHID

[Chris_W.]

Hello,

Using the 5142 (effectively the 5661) changes the way you can think about this situation a little bit, but you would have to take new approach to how you're taking measurments.

If you wanted to use the same structure as the code you have currently with the 5660, then you wouldn't likely see any performance increase using the 5142 as opposed to the 5620, because the bottleneck on execution speed is due to your processing power and how fast the acquisition loop of your LabVIEW code can run. If you switch to the 5142, however, you would then use the NI-RFSA driver instead of the NI-5660 driver, which would then allow you to fetch data continuously from the 5142 and write it to a file, bypassing the processing and peak searching, and then do the processing that includes the peak searching after the acquisition is complete.

Currently the code is made up so that each iteration of the acquisition loop, you read one set of 2040 samples and take the FFT on that data and then search it for a peak. If you had the 5142 and were using the NI-RFSA driver, you would stream the raw IQ data to disk, and then post process that whole file in chunks of 2040 samples, do the peak search and write your peak searching results to another file. If you're curious about how the acquisition would look, there is an example program called "RFSA Stream Binary IQ Data to Disk.vi" which installs with the NI-RFSA driver and can be found at Start»Program Files»National Instruments»NI-RFSA»Examples...

If you took an approach like this, then your calculation on how fast you can switch frequencies on the generation should hold more true, you would just have to verify it in the later post-processing of the data. You would likely have to run the test a few times to see what the data returns after the post-processing, but you would be able to tell pretty easily when the threshold is for hopping rate. In your post processed data, as you increase the rate you change frequencies, you would see the same frequeny's peak in multiple 2040 sample FFTs until you hit the point where eventually you would begin to see more than one peak, at which point, you know that the frequency was switched too quickly.

I hope this helps to clarify the differences between using the two cards.

Chris W

Message Edited by Chris W. on 05-07-2010 03:46 PM

[Rashid931]

Thanks Chris for your detailed reply,

Can u kindly post the actual modified vi instead of JPG picture which you posted in one of your previous replies. I am using Labview 2009.

Thaks and Regards,

RASHID

[adnan_fazil]

THANKS CHRIS...

     I m working on labview 8.2. So kindly convert the VI from 9.0 to 8.2 for me.

REGARDS

ADNAN FAZIL

[Rashid931]

Thanks Chris for your great efforts,

         If NI 5640R IF Transceiver is used instead of PXI-5620 and PXI-5142, then Mr. Adnan can reduce its processing time. Because he does not have problem of acquisition time i.e. 32 microsecond in case of PXI-5620, but he is unable to achieve his target time of 250 microsecond due to processing delay. NI 5640R IF Transceiver is FPGA based and I think it can help Adnan in achieving his target time of 250 microsecond.

         I request to Chris that kindly give your valuable comments on this.

Thanks and Regards

RASHID

[Chris_W.]

Hello,

The reason I did not initially attach the VI for LV 8.2, is that I don't have 8.2 on my machine, and I didn't want to post a version that may not work. Here is one saved back, so hopefully it does work for you. If not, maybe Rashid would be able to post a version saved back for you. If not, you should be able to make the changes that I described in the post that I attached the image to, so that your VI matches this one.

My next question is, Adnan, do you have access to these other pieces of hardware? i.e. a 5142, or 5641R? Or are these questions purely speculative? I'm more than happy to answer your questions Rashid, but I want to make sure we aren't just adding more things to the conversation that won't help Adnan to get to the optimal point he can be with the hardware that you have available.  

As for using the 5641R along with a 5600 downconverter, you are right, this could certianly increase the processing speed and efficiency because all the processing/decision making can happen on the FPGA of the 5641R using hardware time processing loops at rates like 40MHz. This also requires some extra work to learn about and how to use LabVIEW FPGA, which really isn't too tough if you are fluent with LabVIEW. The basic structure of how this could work would be that you sample the data in an FPGA acqusition loop and then using a very fast processing loop rate (like 40, 60, 80MHz, for example) you would take that data, do your windowing and FFT on it, and then search it for peaks on a point by point basis, and when you find the maximum in a particular FFT, then you can send only that data along with the frequency of that signal to the host computer to write it to a file. This basically takes the processing that you're doing inside your while loop right now and implements it all in a hardware timed loop running on the FPGA, and the only thing necessary to do on the host computer application is to possibly display the data, and write it to a file.

There are some good example programs that have been written to do things that are similar to this that you can find on the ni.com/community site. HERE is a demo that was done at NI Week that uses the same hardware that you're inquiring about. HERE is the code that was written for that demo.

There are a couple things you have to keep in mind about this approach though. First of all, there is going to be a bit of a pipelined delay between when you start doing the FFT processing on the incoming FFT sized segments of data and when you would get a result for the peak in that spectrum. Because this processing is done on the FPGA, this delay would be pretty small, and would only be noticeable at the beginning of the acquisition because the data would be pipelined, but should still be accounted for. The other thing to note, is that support for the 5641R is only included in LabVIEW 8.6.1 and later, so this may not even be an option for Adnan.

If you would like more information about using LabVIEW FPGA, or are just curious about it, you can find information HERE. I hope this helps.

Chris W

[Rashid931]

Thanks Chris for your detailed and informative reply.

Regards,

Rashid

[adnan_fazil]

THANKS CHRIS
 
 After your previous post , i have started working on the following hadware:

1. NI PCI-5640R
2. NI PXI-5600
3. NI PXI-5652
4. NI PXI-8331 (complete MXI kit i.e. PCI-8331 and PXi-8331 with copper cable to connect the chassis with the computer to use it without embedded PXI controller)
5. NI PXI-1044 Chassis
6. Intel core2 CPU 2.4GHz with 1GB RAM.
7. LabVIEW 8.2
8. Windows XP SP3

I have used PXI-5600 in "Downconvert Only" mode with NI PCI-5640R as an external digitizer.The connection between these two cards is only a single SMA to SMA cable.Thanks to you and rashid because your idea was really useful, as now i can read approximatly 1600 hops per second (i.e. apprx. 600 microseconds per loop) by using PXI-5600 as downconverter with PCI-5640R as digitizer.

  
NOW My questions are:

1. Can I improve the time? so that i can meet the requirements i.e. 250usec.

2. Can i improve the frequency accuracy? as the frequency error is about 2-6KHz as shown in the excel file.

3. Is it necessary to connect the clock output of PXI-5600 to the clock input of PCI-5640R?as i m using the
cards without connecting the clock from PXI-5600 to PCI-5640R (because i stil dont have SMA to SMB cable to do that).

4. Will programing the PCI-5640R in LabVIEW FPGA module increse the speed and accuracy than the present situation?? as  i m using PCI-5640R with NI-5640R instrument driver Programing.

Wating for your helpful reply like the previus one.

I m attaching the 3 files i.e. My analyzer VI(running PXI-5600 and PCI-5640R), My generator VI (running PXI-5652 for hoping signal generation) and the excel file generated for dwell time = 100ms.

THANKS IN ADVANCE

BEST REGARDS
ADNAN FAZIL

[Chris_W.]

Hi Adnan,

That is good to hear that this did speed things up. Doing your programming/decision making (peak searching) on the FPGA should allow you to acheive the 250µs target you're shooting for. Doing some simple calculations based on the default loop rates on the FPGA VIs, we have the acquisition loop that runs at 25MHz, so if we are taking 2048 samples at that rate, we are looking at an initial delay of just  about 82µs delay to acquire all samples, then we have to add a slight delay on top of that to account for the time it takes to perform the FFT, but this can be done at a much higher loop rate than the acquisition loop. We will then have another slight delay between when the FFT is fully processed and when we have checked the last point of the FFT to see if it is the peak.

I would say that you should be able to do this processing all in around 200µs. This is just an estimate, though and would have to actually be calculated based on the loop rates that you have selected for acquisition and processing.

A good starting point would be to take a look at the example program called ni5640R Analog Input, which is a basica analog input example, but in the processing loop, you can see that there is a subVI that is listed as "place your code here." This could be where you insert the FFT/windowing. This is a good example to show you how the host/FPGA interact when actually using this device through the programming of the FPGA.

Once you're comfortable with this example, I would take a look at the Developer Zone example that I posted a couple posts ago, which performs a spectrum acquisition on the 5641R. The FPGA code in this example does almost everything you would want to do. You'll notice that it acquires data continuously, then Windows it and takes the FFT and sends it back to the host. This VI also already does a peak search, but the only thing you would need to do is to pass back the peak search and the calculate the frequency of that peak and pass just that information back to the host to be written to a file.

Does this help? Getting started with the FPGA example VI will be a good jumping off point and if you have questions after that, I'm happy to help.

Chris W