Hi.
I would like to know if it is possible to implement a 2d gain scheduling on my FPGA. The idea is that my regulator gain must relay on two different parameters. But as far as I can see it is only possible to cunstruct a 1d array on my FPGA - is this true? I have to look the values up at 2kHz.
My FPGA target is the cRIO 9104.
Any exampels of a gain scheduling strategy?
Best regards
Søren Stubkier
