04-25-2008 07:34 AM
04-29-2008 06:12 AM
Hi Chammika,
When you use an emulator, the FPGA VI runs on your computer. Certain aspects of the application, such as timing and determinism, can be different when run on the FPGA target. Is the behavior you are seeing related to timing? What is the difference between the intended behavior and what you are seeing?
Could you provide more details about the variable? When does its value change, and when should it change? Does this happen in emulation mode as well as with the FPGA target?