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Analog Data Acquisition slowing FPGA

Hello,

 

I'm currently running a control program that acquires temperatures from 9 different thermocouples.  I've noticed that as I move up in the amount of TC's the slower my loop can run on the FPGA.  With 9 it's somewhere around 125 Hz and can run quicker as I remove TC's.  I believe this could be because i'm accessing the TC's one at a time.  Is there a way to gather multiple data points in one swipe opposed to  accessing one at a time?  I've compared my set up to the example finder in labview and it appears my acquisition method is the same.  Maybe someone has ran into this issue before? Perhaps there are limited numbers of analog data I can grab on an FPGA without impacting performance? I wouldn't think 9 TC's should be a problem.

 

-Colt

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FPGAs can process megabytes (and more) per second; given that I highly doubt the FPGA is slowing things down.

 

Can you give more info on the system?  What hardware are you using?  Can you post code or images of it?


Certified LabVIEW Architect, Certified Professional Instructor
ALE Consultants

Introduction to LabVIEW FPGA for RF, Radar, and Electronic Warfare Applications
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The problem with TCs is that measurement itself takes a long time for noise reasons. So, yes, anything in that loop will slow down. Things outside the loop won't. It's all in the spec of the TC card though.

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NI makes thousands of products and several TC cards.  You have not provided any product info.

Which FPGA card is being used?


Certified LabVIEW Architect, Certified Professional Instructor
ALE Consultants

Introduction to LabVIEW FPGA for RF, Radar, and Electronic Warfare Applications
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Colt,

 

I suspect what you are running into is a side effect of a multiplexed thermocouple device. As an example, the NI 9213 has 16 multiplexed channels. That means it has one analog to digital converter, but 16 measurement paths. If you only look at one of these continuously, you can sample it essentially as fast as the ADC can deliver. However, as you add more channels, the ADC is spending some of its time converting the other channels. If your loop timing is dependent on the return of a new measurement, then the more channels you add, the longer it's going to take for the module to cycle through all the channels and return the measurements. 

 

I hope this helps answer your question!

-------------------

Larry Morgan
Senior Hardware Engineer
National Instruments
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Thanks for the response .  The module we are using is an NI 9213.  We use these in both our cRIO and ethernet based cDAQ systems and we obtain access rates per channel that are consistent with the NI 9213 documentation (acquisition rate is 75 samples/sec (includes autozero and cold junction).   We can do this on both the cRIO using the FPGA interface and the cDAQ system.  However, the cDAQ system allows us to sample at higher rates producing duplicated thermocouple measurements as required.   This capability is used to allow higher speed voltage measurements to be made concurrently with thermocouple measurements.  It is this latter capability that we cannot duplicate with the FPGA system.   We have a loop that accesses both thermocouples and voltages and our maximum sample rate is determined by the NI 9213 module when we use the FPGA.   This is not the case with the cDAQ system.   Sorry, but we cannot post code.

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Use an additional loop for reading the TCs and store the data in global variables or registers.  You can read these in your acquisition loop and be able to run at the rate of those modules.  Similar effect: you will have duplicate samples.


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