Analog voltage measurement issues with on-board 16 bit ADC of sbRIO 9627

[ThomKreider]

This plot of noise across different channels is what I see on my sbRIO-9636.  I'm sampling at 8KHz on 2 channels in differential mode using AIN0 and AIN1.  AIN0 has a factor of 10x or more noise than AIN1.  I've swapped the sources and it's following the AINx channel, not the source.  The sbRIO AGND is properly grounded, the signals have a reasonable common-mode voltage (1.5v), the source impedance is <1Kohm resistive into an opamp.  (anyone notice the sbRIO manual doesn't state an explicit common mode voltage limit other than some mixed comment with absolute voltage limit?)

The OP later seemed to claim victory over the dropped samples in his filter.  But the voltage graph isn't resolved yet.

[nanocyte]

I had a 9626 lying around and ran the test there. I didn't see any significant difference in noise performance between AI0 and AI1. I used the MIO breakout. I put a 10k resistor between AI0 and AI8 and between AI1 and AI9. I've attached my code.

[ThomKreider]

Hi Nano,

I'll try a similar test and see if I can recreate the issue with dummy loads.  However, this still doesn't address the issue.  I have a source on one channel that acts differently on another.  If the manual is correct in the architecture topology of the AIN side, then there shouldn't be any difference.  I have addressed the common issues around poor grounds, references, common-mode, etc.  Two sensors and two signal conditioners, where one channel of the sbRIO is significantly higher noise than the other even when sensor/signal conditioners are swapped.  This is what I understood the OP to have too.

(In diff mode, one of those two inputs would need a path to ground to keep it from floating out of CM voltage range.)

Thom

[nanocyte]

How much noise are you seeing? And what voltage range are you using?

I would try and bring the signal through the MIO break out if you have one just so you can experiment there with possible low pass filters.

It might be interesting to try another RIO just to rule that out.

My strongest suspicion with this issue and the OP's issue is that AI0 and 8 are all the way at the end of the ribbon. It seems possible it's noise source near there.

[ThomKreider]

The analog input channels are set for +/- 1V.  From memory, on AIN1 I see ~5mV PK-PK and on AIN0 I see more like ~50-75mV PK-PK.  I'll try to grab some data tonight.  The signals are routed through the 1m ribbon into an NI terminal strip (not the nice metal one).  The signal is DC - 1250Hz sinusoids, fixed amplitude, with no intentional discontinuities - pretty benign.

Since AIN0 and AIN1 are pretty close on the ribbon, it seems less likely to get 10x noise from just a pair or two over.

The output of the op-amps are going through a 1k resistor into the terminal with 1uf in parallel to GND.  So there is a low pass filter on it.  But, filtering the noise isn't a solution, it's a mask for something else going on.  Both channels gets cleaner, but the relative noise floor is still off by a factor of 10x or so.  While there is some settle time associated with the 1K resistors, I see this noise even with DC inputs with or without the filter.

Thanks for your help!

[nanocyte]

Consider measuring the inputs to the RIO or the MIO breakout using another source. Ideally, I'd use another NI DAQ card but you could also try an O-Scope.

Consider how much higher your noise level of even 5mV is compared to the dummy load noise I measured of around 30uV. It seems like either a bad unit or an external noise source.

Have you tried switching to RSE mode instead of differential? Then you could check AI0 and AI8 independently and that could give you a hint.

[ThomKreider]

Excellent ideas nano.  Time is not on my side, so I haven’t been able to get back into the lab to test yet.  But you’ve given me some great ideas!