CompactRio FPGA RT Control Acquisition and generation of AI and AO

[wgkotb]

Hi,

I have build my code (see attached files) to acquire 3AI and write 1 AO via FPGA and pass them to RT for math operations.

I have a n error when I tried to make some math conditions of the two AI signals (see the code)

I have attached word file for the project overview and the ideas of my controllers(sorry for hand made scheme)

could you pleas check the code and tell me how to overcome the error.

Many thanks for your help

Wael

[Clad19]

Dear wgkotb,

Thank you for posting to the forums with your issue. 

I have taken a look at your FPGA code and saw you were using the FPGA I/O nodes to acquire and output your analogue signals. This is correct.

I looked in the .zip file attached but there was no RT VI attached, would you be able to post this up for the community?

What mathematical operations are you trying that prompt an error? Are you performing the maths in your RT VI?

What cRIO hardware do you have? What chassis, controller and modules do you have?

If you could provide more information and certainly the RT VI, the community will be able to help you out further.

I hope this is alright with you.

Here are some further links to look at relating to setting up your RT application:

- Developing Custom Measurement and Control I/O Hardware with the LabVIEW FPGA Module and Reconfigurab...

- Building a Real-Time System with NI Hardware and Software

- Reference Example for Streaming Data from FPGA to cRIO to Windows

- CompactRIO Hands-On Tutorial- Basics I

I hope this is alright for now and let me know how you get on.

Kind Regards,