09-25-2019
04:31 AM
- last edited on
03-27-2025
08:11 AM
by
Content Cleaner
Hello,
I have this issue with CRIO-9066 using the FPGA Compile worker 2016.
My LV is 16.0f5 (32-bit)
According to: https://www.ni.com/en/support/documentation/compatibility/19/compatibility-between-xilinx-compilatio...
It (9066) should be supported since Vivado 2013.4, but as seen on screen dump I am using Vivado 2015.4.
I can build for other FPGA targets fine, but the CRIO-9066 model fails at synthesize.
Error from compile server attached.
Any inputs why this is?
10-01-2019 05:57 AM
Hi Mauritius,
I tried compiling this myself with the software versions you mentioned and it compiled with no error at all on my end.
I would suspect an issue with the installation of the Vivado compilation tools may cause this, can I ask whether using the cloud compile is an option for you?
Regards,
Mitch