DMA FIFO read causes RT disconnection

[tommpogg]

Hello,

I am implementing a system composed by an FPGA (NI-5641R) and a RT controller (NI PXIe 8108 running LabVIEW RT).

The FPGA collects 4000 U64 data and write them on a DMA FIFO (Target-to-Host type).

The RT controller reads the data from the DMA FIFO and performs some operations (such as calculating mean, standard deviations, etc.).

Now, when I execute the code the program freezes and the host disconnects form the RT controller, without displaying any kind of error.

It seems that the cause it is the "read from FIFO" operation (see RT_read.jpg) that fails.

Since no error is reported, I do not know hot to fix this bug.

I am not even sure about the cause.

Please, find attached some snapshots of my code:

- FPGA_write: write 4000 data

- FPGA_wait: wait for a trigger signal and check if the FIFO has been read. If both these conditions are satisfied then FPGA_write is executed.

- RT_read: read form FIFO

Notice that the FPGA write operation is handled by a Finite State Machine (really simple, just 2 states).

Any help on this topic would be appreciated.

Thank you

[R.Kaszubiak]

Hi,

I had a similar problem using FPGA.

You could check the cycle time that FPGA write into the FIFO because of if the pulse trig is true then your code always enqueue element in FIFO.

Then for the reading part, check the "depth" which could be equals to 4000 elements minimum.

The timeout of FPGA read seems to be good.

I think, your RT disconnection is due to a high CPU usage or high memory usage if the DMA buffer is full.

R. Kaszubiak