FPGA I/O Node Use, Mixed RSE and DIFF Channels, NI 9205 Module

[mmusselman]

I am following the example, found at (http://zone.ni.com/devzone/cda/epd/p/id/6206), to sample data from NI 9205 with a cRIO-9074 chassis.  Specifically, I would like to create a program where the user selects:

1.  Which channels to record (to a file)

2.  Terminal style - RSE, DIFF, or NRSE

3.  Voltage Range

Per the above mentioned example, I would like to use FPGA I/O Node to sample the channels.  Assuming I set AI0 to DIFF type and stream values from both AI0 and AI8 (the diff pair), what comes out of the FPGA I/O Node?  By this I mean, does the AI0 channel in the FPGA I/O Node contain the differential measurement?  If so, what data streams out of the AI8 channel in the FPGA I/O Node?

Thanks,
Marcus

[Joe D.]

Hi mmusselman,

AI0 would contain the the differential measurement. I do not know what the value of AI8 would be, but it should be rejected when AI0 is set into differential mode.

Please let me know if you have any other questions.