FPGA Math Speed

[StephenB]

note the module manual. You can find it by searching NI.com
it says the sampling rate is 800k for 1ch and 500k aggregate for multiple channels. Also, I don't remember for this module but for some Modules... You have to set the scan rate in module properties by right clicking in the project.

also, you can bet more speed by pipelining. Do your input, math, and output in different stages. That will atleast get your loop rate as fast as the slowest component.

[StephenB]

Oh and If everything can go at the same rate, put it all in the same loop and use one large expanded io node for all the inputs and another for all outputs. This avoids arbitration which will greatly increase speed and reduce space used.