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High speed data transfer from cRIO to host PC

Hi,
 
I am using the FPGA on my cRIO 9004 to do two things:
 
* generate pulses at a varaible rate to drive stepper motors
* acquisition of an analog signal with use of the 9215 module at about 240kHZ
 
I'm having a question about the acquisition part: My goal is that I'm able to get all the acquired data on my PC to visualize part of the datapoints (at a few Hz) in a graph, preferrably while the process is running (a delay, for instance caused by a buffer, is not a problem), and after the acquisition has ended (approx. 30 seconds) store all the data in a file.
 
Getting the acquired data from the 9215 port to the cRIO is no problem using DMA.  This is very fast and easy. My question is how to get the data to from the FPGA to my host PC?
What are my options?
 
Should I read the data in blocks/arrays from the DMA on the cRIO and directly write it to a shared variable with FIFO to send it to the host PC? Should I then use handshaking between cRIO and host, or check timestamps of the variable on the PC to check for overflow/underflow?
 
Should I open a reference to the FPGA VI on the PC to readout the DMA on the PC?
 
Or is it just too much data that I want to transport over the network? Should I store all the data on the cRIO and send some off the data to the PC to visualize it and when the acquisition has stopped, get the file from the cRIO to read all the data and store it?
 
Thank you,
 
Tomas de Boer
 
 
 

Message Edited by Tomas de Boer on 02-15-2006 07:40 AM

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Try this link:
 
 
 
Preston Johnson
Solutions Manager, Industrial IoT: Condition Monitoring and Predictive Analytics
cbt
512 431 2371
preston.johnson@cbtechinc
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Hi Preston,

I was wondering about this very issue.  Am I right to say that I can use cRIO like any other LVRT device?  From your referenced article, it appears I can implement custom TCP messaging on the cRIO to communicate with the host -- just like I do now with Compact FieldPoint.  I, however, read in the cRIO tutorial that we always have to use the reference to the FPGA VI to get the data.  And there it uses a VISA resource.  I am not sure how and why we would need a VISA resource.  Can't I just take the FPGA data and send it over TCP? 

Also, I would like to know, if there's any difference at all between cRIO and Compact FieldPoint as far as comunication with the host (or other controllers) goes.

Thank you!

-Khalid

PS:  I am glad to see you're active on the forums...  though miss you on the Lookout forum  Smiley Happy

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Thanks for the note Khalid, more and more Lookout technology is integrated into LabVIEW, this is true with LabVIEW 8.0 and the shared variable. 
 
That aside, with VISA, I believe you can open a reference to the FPGA backplane from your host.  This is essentially what LabVIEW does when you are develiping FPGA code for the cRIO target.  You might need to set up the alias in Max, and then give it a go.  I have not tried this yet, as I am always doing something on the RT side. 
 
In addition the the TCP/IP works, depending on the data size, you might try the new shared varialble to more easily transfer data back to the windows hows, and then even use LabVIEW DSC to alarm and log the data. 
 
Hope this helps
Preston Johnson
Solutions Manager, Industrial IoT: Condition Monitoring and Predictive Analytics
cbt
512 431 2371
preston.johnson@cbtechinc
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Hi Khalid,

Regarding your specific question "Am I right to say that I can use cRIO like any other LVRT device?", yes you are right.

In essence, the cRIO-900x controllers are like the FP/cFP-20xx controllers, they are just different platforms. In FieldPoint you have the ease of use of the FieldPoint API to talk to IO, and in CompactRIO you have power and flexibility of the FPGA to write your own low-level application to interact with IO.

Regarding the VISA resource, NI-RIO/cRIO leveraged VISA for communication between the FPGA and the host. For the cRIO case, the host could be a local RT host or a remote machine (your windows box).

Hope this answers the rest of your questions.

JMota
National Instruments - R&D
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@JMota wrote:

Regarding the VISA resource, NI-RIO/cRIO leveraged VISA for communication between the FPGA and the host. For the cRIO case, the host could be a local RT host or a remote machine (your windows box).


Do you mean I can use this FPGA VISA resource directly from my Windows host?  I was thinking we still have to go through RT first to get to that VISA resource -- just like I would have to with Compact FieldPoint to get to the VISA resource for the Serial port on the cFP.  I can't access the cFP-Serial Port's VISA resource directly from my Windows host.  I have do it from my RT VIs.

Would appreciate if you can clarify this.

-Khalid

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Yes, you can use the FPGA VISA resource directly from your Windows host. You just need to be aware that since the communication is across the network, things are going to be slower and not as reliable as doing the communication directly to RT.

I'm pretty sure this capabilty is documented in one of the manuals, but I can't remember where. Here is what you need to do for this to work:

Enable access to you windows machine in the controller
1. In MAX, browse to your cRIO RT Controller and expand its software category.
2. Select the NI-VISA  item and go to the "VISA Options" view (second tab)
3. Browse to the VISA Server>>Security
4. Enter your Windows system IP address, or just subnetwork followed by the wildcard (e.g. 192.168.1.*).
5. Click Save
6. (Optional) Browse to the local My System>>Software>>NI-VISA and select under VISA Options>>General Settings>>Remote your cRIO RT controller (refer to VISA and cRIO documentation for more information about this)

Write your application on the host
1. The same Host VI that you write to run on RT to communication to the FPGA, you can run it from your Windows host by passing into the Open FPGA Reference node the fully qualified visa resource address of the FPGA Target (e.g. visa://192.168.123.212/RIO0::INSTR). If you do step 6 above, VISA will automatically discover the address for you.

JMota
National Instruments - R&D
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