10-19-2008 10:15 PM
10-20-2008 05:43 PM
DJMILLER,
Are you wanting tod o the PWM on the FPGA or the RT target? Would you be able to post your code and an image of your actual results as well? I see the pictures from the windows code, but the .lvproj file doesn't give much insight as to what you are doing on the RT and the FPGA sides of things.
10-21-2008 12:31 PM
I am trying to implement everything on the FPGA. The code I am giving you is another attmept that seems to work a lot better. I added a digital filter to make sure I was getting a sinewave out of my NI 9263 since I was sending a sinewave into the board with a NI 9205. Although I don't understand why the digital filter cuts off around 4K if I set to start attenuating at 30K and it cuts off at 2K if I set it to start attenuating at 20K? The other question is if I could do anything to make sure the input signal and triangle wave is comparing all points because the noise I hear out isn't all that smooth? I probably am lacking understanding. I can send you the picture later today of my setup. Another goal is to have the triangle wave follow the amplitude of the input audio signal, but first I would like to hear a smooth sound on the ouput with a set input from a function generator.
Note: Using a crio 9074.
Thanks!
10-21-2008 12:50 PM
10-21-2008 02:34 PM
10-22-2008 11:11 AM
DJMILLER,
I guess I am having difficulty understanding exactly what the problem/question is with this. It is difficult to look at the filter settings from the picture as that's the only code you submitted. The .lvproj file only tells me what modules you are using pretty much. It does not include any VIs with it.
I see your sawtooth generation (pretty slick) and the comparison which looks like it is running properly according to your oscope pictures. It seems now like the question is regarding the filter? Could you post the FPGA VI that you are using for this. It looks like your output is pretty close to a sine wave now.
Have you wired an analog input directly to an analog output to view what it looks like after being digitized? Additionally, have you viewed your output from your sawtooth wave as well to get a better understanding of how that is lining up to your wave?
10-22-2008 12:15 PM
Jared_B,
Sorry, I didn't realize the live project didn't include the VI. I will attach the VI and a picture of the filter setup. When your talking about connecting an analog input directly to an analog ouput to view how it is digitized in the FPGA. Do you mean connecting directly from the 9205 to the 9263 modules? I don't have a module that is strictly analog I didn't think.
Thanks,
Dane Miller
EE
ASU Student
10-22-2008 12:53 PM
Jared_B,
The other issue beyond the filter would be to have my sawtooth wave follow the amplitude of my input signal. Do you think that would be possible? Any suggestions? I was thinking about trying to utilize the max, min block some how, but that block does not fluctuate with the input signals maximum value as it will not decrease when the input waves amplitude is decreased.
Dane Miller
EE
ASU Student
10-22-2008 10:13 PM
Sorry to post so many questions, but today I did what you said and tested out what my sine and sawtooth wave looked like that were going towards the comparator(greater than block). I discovered that as I increased the magnitude of the sinewave it started to look more like a square wave ruining the quantization and my sawtooth looks like a square wave. I was thinking the multiplication on the sawtooth is the cause of the square ouput much like the multiplication ruined the sinewave. I haven't had time to test out that theory. It works in simulation good, but I am confused about what is exactly happening on the board.
Thanks,
Dane Miller
10-23-2008 05:33 PM
Dane,
I meant connect things up how they already are, but in your FPGA code just have your AI node directly connected to your AO node and view the output of that. Essentially read from your analog input and write the data immediately back out to your analog output. This will give you a better idea of how your signal is appearing in the FPGA code.
Keep up the tests. Things in FPGA are much trickier than simulation or RT for that matter. Depending on the magnitude of your sawtooth wave it could be hitting a max level of the datatype or something like that (therefore looking like a square wave, etc). It sounds like you are on the right track, just keep tinkering with it.