Implementation of High-order controller on FPGA

[Stubkier]

Hi!

I am trying to implement a high-order (5th) on my fpga, and im dont belive the only way is to make the VI my self. I have noticed that it is possible to construct models, transfer functions, ZPK, SS and so on. Is it not posible to convert these into labview code which I can implement on my FPGA in such a way that my control error is my input and the control signal is my outout...? Please, what am I missing here?

Im using Matlab (Simulink) to design my controllers, but i am in no need of a direct implementation, although i have heard it is possible? I just want to type in my poles, zeros and gain and let labview handle the rest.

Best regards.

Søren Stubkier

PS - I am a noob in Labview - so be gentle:-)

Message Edited by Stubkier on 05-01-2008 04:16 AM

[The Specialist]

Hi Stubkeir,

I will not be gentle.  I expect you to be very knowledgable is LabVIEW, and also I expect you to be able to launch NASA Rockets from your location in 1 hour 🙂

1)  First, what FPGA target are you using?
2)  You said you were doing a fifth order on your FPGA.  Do you mean a 5th order filter, 5th order polynomial fit, 5th order control system.  Specifics will help.
3)  I think you mean 5th order filter.  If that is the case, do you have the digitl filter toolkit.  That is the key to easy filter design.  And it even works on FPGA targets.

Talk to you soon.

[Stubkier]

Hi.

Thank you very much for your time:-)

1) I'm using a cRIO-9104

2) Yes, it is a filter i want to implement, but it has to be one where I can place the poles and zeros as i want.

3) i'm not sure (not easy to help), but under "signal processing" i have a lot of different filters i can choose between - but that does not seem to be an option on the FPGA target - am I missing something?

I really hope you can help me, i dont have much time to make this work:-\

Best regards Søren Stubkier

[The Specialist]

Hi Stubkier,

Then this is how I would start if I was going to make a digital filter.  Open the example finder.  Go down to Toolkits and Modules.  If you have the Digital Filter Design Toolkit then we are in business.  If not, then I don't know how to implement exactly what you want.

In the Digital Filter Design Toolkit go to the Getting Started folder.  There is an example called Create Filter from Zero-Pole-Gain.vi.  I don't have the toolkit installed on this computer so I can't walk you through it individualy. 

After you have reviewed that, go to the Fixed-Point Folder.  I imagine an example in there will relate to what you want to do.  I wish I was at my other computer, but that is the best to what I can do now.

[StevenA]

Specialist is right.... Digital Filter Design toolkit is the best way to go..

[Stubkier]

Okay, it looks promising:-)

I have looked into the examples and it seems like it is just what I need. If I understand it right I can construct my own VI which will work as my filter on my FPGA, am I right?

I have attached a VI where i have tried what I think you want me to do, but I can not seem to get it to work. Could you please look at it and tell me what i have done wrong?

The error:

Digital Filter Design Toolkit:  The LabVIEW Digital Filter Design Toolkit does not support LabVIEW FPGA code generation for this filter structure.

I think it is the Quantizer VI which is the problem!? How should I set this up?

Hope you can help me.

[The Specialist]

Can you include the entire project (with your target)?  Also what of LV, NI-RIO?  Make sure you have RIO 2.4 (the version that fixed-point was added).

[Stubkier]

Hi again

I really appreciate your help.

Hmm, LV 8.2 and RIO is only 2.3.0:-\ What then?

I have attached the entire project. It is kind of widespread and on top of that my first LV project - so once again, be gentle:-)

I have not tried implementing the "selfmade" regulator in the project yet as I could not generate the FPGA code.

Really hope you can help me as I am working on a project which is due in a short time.

Best regards Søren Stubkier

[The Specialist]

I am pretty sure fixed-point is LV 8.5 and here is the link to back me up:
http://digital.ni.com/public.nsf/allkb/8C33AC9446631A2B862573A20083CB53
Does anyone know if you can do uncalibrated pole-zero filtering for Stubkier?

[Stubkier]

Actually I have acces to LV 8.5 and started my project on that platform, but it didn't seem to work with the RIO 2.3 software so i installed LV 8.2 instead and then there were no problems.

So what you are saying is that it is not possible to generate the LV FPGA code for a random filter when I'm using LV 8.2 and RIO 2.3?

Im a bit nervous as my hole Master thesis depends on this implementation:-)

Hope you can help me