Implementing SPI protocol using PXI-7833R

[moderator1983]

Hello everyone,

I'm trying to implement SPI protocol using PXI-7833R, so that it should behave as a SPI master and should be able to communicate with a SPI device (treated as slave).

Now I already found an example, but the problem is, this example uses cRIO-9103 as FPGA target and in my case I'm going to use PXI-7833R as FPGA target, and when I'm changing the target (from cRIO-9103 to PXI-7833R), I dont know how to map I/O's listed under 'Chassis I/O' (under cRIO) to the new target (which is PXI-7833R).

[moderator1983]

Hi All,

Somehow I was able to change the target (from cRIO to PXI-7833R).... but now I'm getting an error while trying to compile the code.

The error description is:

"Multiple objects are requesting access to a resource through a resource interface from both inside and outside the single-cycle Timed Loop, which is not supported.

Place all objects requesting access to the resource interface either inside or outside the single-cycle Timed Loop."

[alcava.cr]

Hi, I was searching for similar issues and ran into this thread. Check this article, it says "Multiple FPGA I/O Nodes configured for the same I/O resource if at least one node is inside the loop and at least one node is outside the loop " cannot be used in a SCTL. That being said an easy fix will be to replace the SCTL inside the "Example_Port Code_cRIO.vi" with a regular loop. I tested it on my machine with an offline PXI-7852R and finished the compilation successfully.