LV Project must be open for some of my FPGA VIs to work

[jcarmody]

I've written a bunch of VIs that I use to communicate with a UUT using a PXI-7813R connected to a cRIO-9151 chassis containing two NI-9403 DIO modules.  I developed these (LabVIEW 8.6) in the context of a LabVIEW project and some of them work well whether I have the project open or not, but some of them don't.  I need to run these from TestStand so I haven't compiled anything.  The ones that require the project all manipulate the Flash memory on my UUT.  Perhaps that has something to do with this?

Do you know why this is and what can I do about it?  Perhaps I can change something about my VIs or open the project from TestStand?

Thanks, 

[StephenB]

Hi Jim,

If you could narrow down the differences in utilization on the FPGA VIs in question it would really help me debug the issue. For example, the one that works uses DIO Ports instead of Lines... 

There has to be something different between them that is causing this issue. If you can't find something that jumps out to you in just a look over, feel free to post one that works and one that doesn't so I can take a look myself.

Thanks,

[jcarmody]

Thanks for joining.  Please be patient with me as I work through a few other issues and get back to this one in a few days...

[Spectre_Dave]

Jim

Try selecting the bitfile instead of the FPGA.vi in the Open FPGA Reference function.