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Labview 8 and cRIO preliminary throughput benchmarks

I did some quick throughput benchmarks of the cRIO to RT controller, and I guess I would like to see if this is in line with what is expected.
 
Scanning 8 channels from two 9215 cards (using the new DMA feature) I was able to sustain about 43Ksamples/second (each of the 8 channels was able to do this, and these are 16 bit integers I believe). This is about 9 times faster than with labview 7 and the same hardware! 🙂  
Does this sound valid?  To test, I simply used one of the demo programs with a known sinewave. Plotting all the points, I can determine if I missed any.
 
 
My next test will be to stream data to a disk. Any suggestions are welcome. I started with the sample high speed buffer to RT file program used in LV7, but I think I messed it up lol.. I am not getting consistent results. If anyone has a sample of simply scanning 8 channels to the RT memory (as a file for later retrieval), I would greatly appreciate it.

Also, I'm wondering if my numbers are accurate.
 
Jeff
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Jeff,

on my preliminary tests I was able to run 8 channels of DSA (2x cRIO 9233) with sustained 50kS/s (each channel contains 32bit data) and it looked to me that this is not by far the end.
This is streaming to memory and displaying all channels through a graph indicator. I did sample a block of 2048 samples to the DMA fifo and transferred the same amount to the RT side at once.

Hope this helps

Stephan A.

National Instruments
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Hi Stephan,

Thanks for the response. Is it possible to get the sample code that you used? I tried many different block sizes for the DMA FIFO (from 2K to 64K) and also different sizes on the RT side. I am confused as to what is the best combination. Maybe I was making my FIFO too big?  At some point I just decided to keep it at 32K on the FPGA and

I thought I was doing 16 bit numbers but maybe they were actually 32 bit? I'll have to go back and check.

Also, have you done any streaming to a file for an extended time with the new DMA features?

In any event, I would love to get my hands on the sample code you used :)) My boss would also be happier, which might lead to more sales for NI! 🙂

My goal is to prove that I can use the cRIO as a psuedo high speed, long term data logger (within storage limits of course). I am close to that now. I am making the argument that I can drop a cRIO into any test system that currently uses a PLC/PC combination and it will be able to do everything plus much more without having to buy a PC and PLC for each system.

Overall I'm very pleased with the cRIO performance difference by just moving from LV7 to LV8.

Any help is appreciated!

Jeff

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Jeff,

attached you can find my code for the 9233. it is derived from two examples that are coming along with the driver. please note that the FPGA code for the 9233 is much more complex as for the 9215 as these module do work differently. but I guess you are interested in the DMA code portion only anyway.

Have fun with it!

Regards

Stephan A.

National Instruments
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Thank Stephan! I'l be trying it tomorrow.

Yes I'm only interested in the 9215 DMA to RT.
 
Jeff
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