05-06-2009 06:53 AM
Hi all,
Does anyone know is it possible to perform RT IO on a PC parallel / printer port using LabVIEW ETS RTOS module, would the "in port" / "out port" VIs work deterministically?
TIA / Martin
05-06-2009 07:06 AM
05-07-2009 07:54 AM
Hi Martin.D,
Good afternoon and I hope your well today.
Your question is very interesting. I would be interested to find out more about your application and why you wish to use the parallel port.
Taking a step back from your question, I felt we should discuss genereally using the parllel port in LabVIEW under Windows. You would have a few options open to you, namely using VISA or using the lower level VIs to write directly to the parallel port's hardware registers. A great guide to using the Parallel Port in LabVIEW can be found here,
Using the Parallel Port in LabVIEW
http://digital.ni.com/public.nsf/allkb/B937AC4D8664E37886257206000551CB
Considering LabVIEW Real Time is now different to running an application like this on Windows. LabVIEW RT does not support parallel port communication through VISA - which would be the easiest method to achieve this result. However, it is possible to communicate to the paralllel port using the low-level In Port.vi and Out Port.vi functions - to write data directly to the hardware registers.
Note: The reason LV RT can't use VISAis because the default serial driver only handles Serial ports, thus the Parallel port isn't seen by the RT OS driver, and hence the VISA cant access the port. I can explain more if you wish to have more information on the details.
Since LabVIEW 7.0 the above mentioned VIs are includes, and there are two examples - 'Parallel Port Additional Data Register Inputs.VI' and 'Parallel Port Read and Write Loop.vi'. Have you used / tried these before?
From further research I haven'ts seen/read any concrete confirmation that the uses of the VIs will work successfully, or even if it recommended. But, it has certainly been suggested in the past.
Does LabVIEW Real-Time (RT) Support In Port.vi and Out Port.vi for Register-Level Programming?
http://digital.ni.com/public.nsf/websearch/5D4CB9B21B4848BE862569E70060AF61?OpenDocument
Reading the parallel port in Labview RTX
http://forums.ni.com/ni/board/message?board.id=170&requireLogin=False&thread.id=183711
* RTX support is based on VISA - which suggests 'support' is limited to PCI>
Re: Is it possible to use the parallel port in LV 7.1 RT?
http://forums.ni.com/ni/board/message?board.id=270&requireLogin=False&thread.id=1576
Again, repeats the advice to use the In Port/Out Port VIs but hard to know if it will work.
I have also read some notes on previous service request/customer applications - were they were advised to consider using the Serial Port / a cRIO. So I would really like to hear more about your applications and your wishes/needs... So I look foward to your reply, and hopefully we can discuss your application further.
Thanks again for the post!
05-07-2009 08:19 AM
Hi James,
Thanks for all the info. My application requires hardware timed, correlated digital outputs (at least 4). I have been looking at using a PCI-6620 / P0 (8 lines) / FIFO buffer. But thought it would be better to run the application under a RTOS and use the parallel port - in port & out port vi’s are preferable for me, inside a timed loop. Since then I have found out that RTX does not support timed loops ETS does though (http://digital.ni.com/public.nsf/allkb/0C0A6EE528F85A6486256F6700061790). This is less attractive that RTX for option me, but I would still like to know if it’s an option as “plan B” if the PCI-6620 does not pan-out well.
-Martin
05-07-2009 08:41 AM
Hi Martin,
Thanks for the prompt reply.
So what extra information would you like from me to help validate if this could be used as a Plan B? - I am sorry, but I wasnt sure what you were asking of the community from your last post.
05-07-2009 05:06 PM
Hi James,
In the future using I may try using “out port8.vi” in a timed loop with LabVIEW RT ETS (as RTX does not support timed loops). What I would really like to know is: assuming I can deterministically execute “out port8.vi” in a loop at say 20KHz will the port be updated as expected? I notice it calls the following file: cviVXDWrapper.dllI guess it will work, as there is no windows scheduler to delay the port access. But I expect the VI in question may return before the port state has changed. I guess a port state could be lost if the next state is written before the previous state has been applied, but that would just be a system limitation. So I would just need to find the maximum update rate for the system and then not exceed it, I would then have the deterministic DIO I require - I think!
Please let me know if you think I may be wrong or have problems with this approach.
Regards / Martin