Sampling rate problem with cRIo-9073

[GiridharYadav]

Dear all,

I am working for one project in which I am using the following NI hardware and NI software

1. cRIO 9073

2. NI 9201

3. NI 9203

4. NI 9425

5. NI 9263

6. NI 9476

7. LabVIEW 8.6, RT 8.6, and FPGA 8.6

In this project I need to acuire different types of signals like 0 to 10VDC from rotary POTs and 4-20mA from Pressure transmitters etc., at specified sampling rate. For example I need to acuire the signal 0 t0 10VDC at 2000 Samples per second and store the same data into my PC at 2000 Samples per sec. Similarly the current signal.

Presently I am using the Machine control architechture in which maximum I am able to store 160-175 samples per second in my PC. In this architechture I am using libraries like CVT, CIE, CCC etc for internal communication. I dont know where the time is consumed.The unclarified doubt in my mind is that, if I try to acuire the signal at some X samples per second then whether that signal should have that X no. of samples or not? For example if I try to acuire the DC signal at 10000 samples per second then whther I would be able to get 10000 sample per second or not? If yes then how can I save those 10000 samples in my PC against real time. Ofcourse that much sampling rate is not necessary to acuire the DC singal, But calrify my doubt.

If I want to obtain the data as mentioned above then How should be the FPGA, RT and PC  programs should be developed.

In this regard I request you all to please provide me a soultion for this.If any one can provide me a example then that would be a great helpfull for me. Still If I need to provide any information, then let me know.

Thanks and Regards

Giridhar

I-Design.

[jkurtw]

Hi Idesign,

The architecture you are currently using is designed for single-point control, meaning that you only move one sample from the FPGA at a time to the RT processor. This limits the speed you can acquire at, because the processor can only do so many fetches of data per second.

To do higher speed data acquisition you should perform buffered acquisitions, where you buffer up many samples and move them in chunks over to the RT processor.

The CompactRIO Embedded Datalogger Reference Example shows how you can achieve this: http://decibel.ni.com/content/docs/DOC-1049

Kurt 

[Shreyas]

Regarding your query of acquiring 10000 samples, if you would be able to acquire all the samples and transmit it to the host depends on how fast you are scanning the data read from the FPGA. For that you might have a look at DMA and IRQ data transfer methods. This and this are 2 examples I could find relevant for your use.

Hope it helps!

Message Edited by Shreyas on 01-13-2010 10:44 AM

[GiridharYadav]

Dear Kurt, Thanks for your reply. The cRIO data logger example is good and i have got to know more about cRIO. But I am not getting how I can modify the present application in the format of cRIO data logger example. In this regard I request you to please go through my application, if possible modify the application as required or let me know the changes to be made so that I can acquire the signal at diffrent sampling rates and log them in the PC. Why I am insisting to change the present application because has the greater flexibility for me to acuire data inot PC (except at specified sampling rate) and better control of the RT logic from PC. The NI Hardware and software what I am using are1. cRIO 90732. NI 92013. NI 92034. NI 94255. NI 92636. NI 94767. LabVIEW 8.6, RT 8.6, and FPGA 8.68. CVT, CIE, CCC, STM, HNE and TCE libraries I have attached the program, Please go through it and help me out. Thanks and regardsGiridhar