Hi,
I found that buffering the AO FIFO was, indeed, the solution (see attachment). Unfortunately, a buffer of nearly 500 msec was needed. There still may be a little bit of strange behavior to watch for considering the fact that this is not technically a "real-time" system. Yet, I hope I can get by doing a little R&D with it before mapping my code entirely to the FPGA.
Thanks again for all the help.
Chris
