crio 9144 fpga hang

[MarkCG]

Apparently a cRIO 9144 with custom FPGA code running on it somehow hung / froze. How do I know this? I have a parallel FPGA loop toggling the FPGA LED at a rate of 1 Hz, and the light was just frozen in the ON state. The program on the ethercat  master, a cRIO-9074 was still functioning.

Any idea what could cause this?

[Sil.VI]

Hi MarkCG,

So, the application that you are running in the master (9074) is the same running in the expansion chassis and it works fine on the master but hanging on the slave?

Probably you might find interesting the following documents, it explain how you should setup the expansion chassis in order to work with a cRIO controller and also some ways of optimizing your FPGA code.

https://knowledge.ni.com/KnowledgeArticleDetails?id=kA03q000000YHbbCAG&l=en-US (Ethercat setup)

https://www.ni.com/en/shop/electronic-test-instrumentation/add-ons-for-electronic-test-and-instrumen... (Parallel Execution and Pipelining)

[MarkCG]

No, the FPGA bitfiles are different for the Master and Slave. I'm quite familiar with how to set up and EtherCAT chassis, and make it work with a custom bitfile /FPGA code. I am also aware of pipelining etc. The problem I am describing has nothing to do with throughput performance.

The question I am asking is:

are there any KNOWN circumstances under which, a cRIO 9144 EtherCAT running a custom Hybrid mode bitfile will stop executing the bitfile? For example, a hiccup in the etherCAT communications?