generate PWM signal using three phase sinusoidal signal

[rpursley8]

Aren't your sine waves coming from analog inputs?  That would be what you would use.

[rpursley8]

Attached is a picture with a little more detail as to what needs to be replaced when using this with an FPGA.  The number 1024 defines the number of steps the ramp has.  I also scale the ramp by a factor of 4 assuming the inputs are coming from a 12-bit A/D (mutiply by 4 to get 4096 or +/-2048).  If your A/D from you C module is higher than 12-bit then the multiply by 4 will have to be higher as well (16 for 14-bit, 32 for 16-bit).

[university of catania]

hi

I just solved my problem just after i mailed you the querry(the problem i was facing)

though thank you for this reply .

If i would face any problem further , i would not again disturb you

thanks a lot

regards

avinash choudhary

[university of catania]

hello

i want to ask that 

i have set frequency of sine wave as 50 hz

but i neeed frequency of pwm signal to be of order 10khz

what modification should i make?

avinash

[rpursley8]

Your actual update rate for the PWM signal will be the 10 kHz times the number of steps in your ramp.

For example, assume your ramp is 1000 steps, then 10 kHz * 1000 steps is 10 MHz.  With a 40 MHz base clock, you should set your loops to run every 4th clock cycle.


If you want, you can set up your ramp to be 4000 steps and the math will work out to a 10 kHz ramp output if you update every clock cycle.




Message Edited by rpursley8 on 07-07-2008 07:38 AM

[university of catania]

Thanks for yout mail

but sorry i couldn't get it what do you mean by set your loop to run every 4th clock cycle

could you show the change on the .vi file you sent me

simply i want to set frequency of sine wave to be 5o Hz.

and PWM signal to be order of 10KHz.

regards

avinash

[rpursley8]

Post your FPGA code so I can show you what I mean.

[university of catania]

here i have attached my lab view project

you can make modifications

regards

avinash

[rpursley8]

You essentially don't have an FPGA design.

Attached is a basic FPGA design for PWM.  You will have to change the inputs and output to match your physical setup.

This should, hopefully, get you started.




Message Edited by rpursley8 on 07-07-2008 12:37 PM