save data into RT target instead of Host Computer

[willy9394]

Dear NI engineers:

Currently I am a CRIO user. I am running RT code and host code together in a laptop continuously in my customer's site. I have some questions regarding writing data files.

I am now using TCPIP to transfer all the data I need from RT VI into my Host VI. My host VI just collects these data and writes into a spreadsheet once a day and stored somewhere in the laptop's C drive.

My customer is asking me if this system can run without this external laptop/Host VI. It means that if I deploy my RT VI into the compact RIO controller and starts running once the controller is booted up, can I still write data files and store them inside the compact RIO controller without running any host VI? This way they can plug their laptop in anytime they want to access the FTP to extract those data files.

Please let me know any ideas

Cheers

Willy

[Jeff M]

Hi willy9394,

One of our engineers developed a nice example program that demonstrates datalogging for CompactRIO, that I am attaching to this message. Take a look at the architecture, specifically the VI called "Host Data Logging.VI". (It's referring to the cRIO RT controller as the host) This should serve as a good starting point for developing your application.

Description:

"This example shows a simple data logging operation using the CompactRIO embedded controller and a cRIO-9215 analog input module. The example can be easily updated for other modules or multiple modules.

The example consist of a VI that is downloaded to the FPGA and the host VI that is run on the CompactRIO RT controller. The host VI handles downloading and running the VI on the FPGA. A third VI can be used to read a data file in LabVIEW for later processing and display.

The FPGA VI acquires data from 4 channels of the 9215 module in slot 1. The data is buffered in a FIFO on the FPGA and then transferred to the host application using a handshaking transfer process. The host application writes the data into a binary file. The file includes a simple binary header containing the number of channels of data and the sample rate used to acquire the data. After transferring the data file to a Windows machine, the third VI can be used to read the data file and display the data on a graph."

Let me know if you have anymore questions.

Regards,

Jeff M.

Applications Engineering
National Instruments

[zenith]

I modified the project file provided by Jeff so that it can be executed in 8.2 FPGA module.

I used cRIO-9004 controller and cRIO-9104 chasis with NI-9215 plugged at slot1.

You can open the datalogging.lvproj and chage the configurations to fit your cRIO system.

[Lex Rex]

I'm new to cRIO, but I thought that I would try to modify the project file provided by Zenith for use on our system. Here are a few details about our system - 

Labview 8.5

cRIO-9014 Controller

cRIO-9102 Chassis

NI-9219 AI Module

I was able to create a new FPGA target (that matched our system) in the project tree, & then modify and move the pertinent items to it. Unfortunately, it seems that the "Host Data Logging.vi" (which runs on the RT target)refers to a number of subvi's that can not be found. These also appear in the project tree under "Dependencies" along with a warning that they have "been deleted, renamed or moved on disk." I'm wondering if these were left out of Zenith's compressed file for LV 8.2 because they were included in a standard library (which has since been modified).

I would like to make use of this project, & I think that it would be educational to learn from other peoples code. So if anyone has any ideas on how to access these subvi's, or how to otherwise make this project work with LV 8.5, I would certainly appreciate your input. If I am able to successfully modify it for 8.5 then I'll post it in a follow up.

Thanks in advance.

[Lex Rex]

Oops forgot to compress the project files.

Message Edited by Lex Rex on 06-13-2008 06:12 PM

[Lex Rex]

Message Edited by Lex Rex on 06-13-2008 06:12 PM

[Pakman]

Hi Lex Rex,

What subVIs does LabVIEW say that you're missing?  I just tried opening zenith's LabVIEW 8.2 project in LabVIEW 8.5.1, and the only missing file was "datalogging.lvproj_FPGA Target_cRIO Data Logging.vi.lvbit".

[Lex Rex]

Hi Pakman,

There seem to be several vi's that are missing when I try to open the project with LV 8.5. Instead of listing each one individually, I will try to upload a WordPad RTF file with a screenshot of the project.

The file that you mentioned (datalogging.lvproj_FPGA Target_cRIO Data Logging.vi.lvbit) is also one that I'm missing, but there are several more missing in the "RT CompactRIO Target / Dependencies / vi.lib" folder in the project tree. Including the one that you mentioned, I have a total of (9) files that appear to be missing.

Thanks again,

Doug H.

[Pakman]

Hi Lex Rex,

Try the attached project.  I simply made a fresh project in LabVIEW 8.5 and added the LabVIEW 8.2 files.  Let me know if this works for you!