Division by 2000 without 'Quotion & Remainder' bloc (FPGA)

[PortmannJ]

Hello,

i need to divide a signal by 2000 with LabVIEW FPGA. With this software version it is said that using a 'quotient and remainder' bloc isn't good (it takes a lot of place in the FPGA). I can do division by 2^x with the 'rotate left/right' bloc, but 2000 is not a multiple of 2 🙂

i hope that someone has a solution to my problem ^^

sorry if i made mistakes.

Best regards,

Portmann J.

[PortmannJ]

I'm sorry, i've just found the vi to make a division for LV FPGA

http://forums.ni.com/ni/board/message?board.id=170&message.id=109575&query.id=284148#M109575

🙂

all my apologizes

Portmann J.

[PrashantKV]

How did you implement the division on LV FPGA? Apparently one has to manually set the multiplier and bit shift. Kindly let me know.

Thank you.

[JLewis]

You almost never want to divide by a constant on the FPGA, if you're worried about efficiency, as it can be posed as a multiplication by the reciprocal of the constant. The fixed-point data type (FXPDT) makes this easy, but you can also do it with integer types and constant Scale by Power of 2 operations. For example, one integer solution might be to multiply by 2147484 (ie, 2^32/2000), then shift the result by 2^(-32).

FXPDT gives you more control over precision with configurable word lengths and rounding options. A reasonable solution would be to multiply by .000499994 using an unsigned type with word length 16 and integer word length -10 (<+,16,-10>).