electronic switch

[amitparashar]

I have designed a integrator circuit using input as a dc current source.I have used R=10Mohm and C=2nF and jfet as a switch for charging and discharging of capacitor to get integrated output.For current range 10^-7 to 10^-9 I am getting the perfect output values of voltage but when I am giving current in picoamps the output voltage should come in microvolts but I am getting in millivolts.The output voltage is not going lower than 5 millivolts.Please suggest me the valid reasons.

The opamp I am using is LMC6001.

[johnsold]

It can be a challenge to get the full performance from a high quality device like the LMC6001.

- Have you followed the precautions in the datasheet about guard rings or air-insulated input connections? 

- The specified input offset voltage is 1-2 mV, depending on the grade of device you are using. This offset voltage will appear at the output amplified by the DC gain of the device.  In the integrator configuration it may be difficult to determine the DC gain which will depend on the source impedance of the DC current source and any leakage resistances.  This could account for a 5 mV output offset.  How are you measuring the output voltage?

- Are the inputs within the specified Common-mode input voltage range?  For single ended supplies the worst case is zero. If the circuit is operating within a few millivolts of the limit, it is possible that the performance is degraded. Can you try it with a split power supply?

Please post an image (.png is best) of your schematic.

Lynn

[Henrik_Volkers]

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@johnsold wrote:
[...lot of good points]

Please post an image (.png is best) of your schematic.

Lynn

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That would be of great help ..to help you 😄

[amitparashar]

I want this circuit to work for picoamps.please modify the circuit and send it back.

[Henrik_Volkers]

a PNG of the schematic would be helpful 😉

[amitparashar]

I want this circuit to work for picoamps.please modify the circuit and send it back.

[Dennis_Knutson]

For Multisim questions, you should post to the Circuit Design Suite board - http://forums.ni.com/t5/Circuit-Design-Suite/bd-p/370

[johnsold]

I agree with Dennis that this should probably be moved to the Circuit Design Board.

Comments on your circuit:

- With diodes S1 and S4 back to back, what do you expect the voltages at the gate of Q2 to be? With no conductive path from V3 to the gate the voltage will be dependent on leakages and device capacitances.

- It probably makes more sense to connect the source of Q2 to the input of U1. The voltage at the input is approximately zero at all times while the voltage at the output has a wide range. Connecting that way should make driving the FET more predictable.

- Vgs(off) for the 2N4117A is specified at Id = 1 nA as -0.6 to -1.8 V. Typical Id(off) is specified at Vgs = -8 V as 0.2 pA. It is impossible to tell what the Id will be at other voltages. The "almost off" characteristics are not specified.

- In simulation the current source I1 will be ideal. In your physical circuit the real current source will have some source impedance. Do you have any idea what that value will be? That resistance affects the output offset.

- When the gate drive switches some charge will be injected through the FET. This also is not specified on the datasheet. This is probably not a major factor in this circuit.

Lynn

[amitparashar]

Thanks a lot to suggest me those valuable points.I have posted the circuit on the link that you have mentioned.