Connect RX to TX within the FPGA

[usrp_user_116]

Hi,

I am looking to connect the RX port to the TX port within an X310 ONLY through the FPGA. I want to avoid any delays that would be caused via running anything on a host. For example, I have been using RFNoC in python and C++, however, when setting up a streamer, that streamer seems to be running on the host computer. What I would like is a simple loopback connection from the RX port to the TX port which would only run within the FPGA. Is this possible within the framework of the x310 and if so, is there any example documentation for this setup?

Thanks for any feedback!

[mikiofuku]

Hi.

You can use RFNoC replay block by use Python or C++.

Data flow is as follows.
Rx Radio block->Rx ddc block->replay block->Tx DUC Block->Tx Radio Block

Example is as follows (UHD)
https://github.com/EttusResearch/uhd/blob/master/host/examples/rfnoc_radio_loopback.cpp

Thank you.

[usrp_user_116]

Hi,

I'm not sure I am understanding your reply. The example loopback c++ code is running on the host. It does the loopback, however, data is streamed from the X310 to the host and then back to the X310 for transmit it seems like. Is that not the case? I am basing this on reviewing the system monitor on my system.

I am specifically looking to take the host out of the picture so essentially you are connecting ADC path to the DAC path within the FPGA. Of course using the DDC and DUC blocks are fine but I don't want samples coming into the host and then back out to the FPGA. I want the full loopback running only on the FPGA after an initial setup period. Is that possible?

Thanks

[mikiofuku]

Hi

Please see this document and source code.

https://kb.ettus.com/Getting_Started_with_RFNoC_in_UHD_4.0

const bool skip_pp = rx_radio_ctrl_id == tx_radio_ctrl_id;
// Connect the RX radio to the TX radio
uhd::rfnoc::connect_through_blocks(
graph, rx_radio_ctrl_id, rx_chan, tx_radio_ctrl_id, tx_chan, skip_pp);
graph->commit();

(uhd/host/examples//rfnoc_radio_loopback.cpp)

If you want to running a USRP X310 as stand alone mode(PC less), you should modify FPGA code as follows.

https://forums.ni.com/t5/Example-Code/NI-USRP-RIO-Full-Ethernet-Support-Reference-Architecture/ta-p/...

Thank you.