Signal processing in USRP FPGA

[AliSabra]

Hello everyone,

I want to do some signal processing to an incoming signal through a USRP 2954R RX port. The signal processing must be done on the signal in the FPGA of the SDR. As far as know, that the FPGA downconverts the IF signal then transmits it to the host by default. Does anyone know were can I find this default DDC / DUC code that the FPGA does to signals? I want to add some code to this default one but I can't find it. 

Thank you,

Ali

[AliSabra]

Dear all,

I have a question that it might be easy or difficult.

I have a signal generator that is connected to a USRP 2954R RX port.

I want to perform manually the DDC of the signal in the FPGA before streaming it to the host.

Does anybody know how to perform this type of signal processing ?

I have attached the FPGA code below but I still dont know what block should I use to acquire the incoming signal in the FPGA.

Best regards,

Ali

[bhovhann]

Hi,

I'm not sure but this link can help you 
https://www.ni.com/documentation/en/labview-fpga-module/latest/cdl-node-ref/duc-ddc-compiler/