I've got an X310 with the BasicRX & BasicTX daughter cards. I'm looking at the BasicTX_BasicRx.lvproj project that comes with the NI-USRP driver. I'm looking at the Streaming Xcvr (FPGA).vi for FPGA side processing (the host side examples work fine.) There are a bunch of registers to set. Some are obvious, some are not & there are no help screens. I just want to click the run button & see this thing go like any host side vi. Can some one explain what these registers do & what they should be set to?
reg.notify host.go rcvd 0, 1, & 2
reg.host read.go rcvd 0, 1, & 2
If I tie rx.enable trigger to false will the vi just run without a trigger applied?
what does 'rx.enable trigger sync' sync to ?
Is 'rx.software trigger' a manual trigger?
Should I set rx.select trigger to immediate if I just want the vi to run endlessly when I hit the labview run button ?
Under rx.0 impairments what should inline & cross gain I & Q be set to ?
& there are a lot of resets. Are the resets edge-triggered? Can I just tie them to False or do they need to all be clicked on startup?
Thanks.
