06-30-2015 10:51 PM
Hi,
I have gone through the below link and created a custom fpga code to write analog output and digital output through NI 9269 and NI 9472 card respectively.
NI Veristand add on - fpga configuration editor.
https://decibel.ni.com/content/docs/DOC-35499
i was able to import the .fpgaconfig file in veristand system definition window.
When i execute the code, i am getting IRQ timeout error.
Could any one help me how do i debug this error?
i am interested to see how the veristand host code is executing it.
07-01-2015 05:20 AM
Hi,
Have you tried to simplify the FPGA code? If the issue is related to the VCE, you should post there :
- https://decibel.ni.com/content/message/67188#67188
The developers of this tool will answer you.
Posting the error message or the FPGA code will also help us 🙂
Regards,
--Eric
Eric M. - Senior Software Engineer
Certified LabVIEW Architect - Certified LabVIEW Embedded Systems Developer - Certified LabWindows™/CVI Developer
Neosoft Technologies inc.
07-01-2015 06:30 AM
Most probably number of items in FIFO from FPGA will not match the number of items (packets) in the XML.
CLA, CTA