Any advice on CLA exam time management?

[Embedded_Desi]

Hello all,

I am planning on taking CLA certification exam and I was hoping to receive some advice on managing time during CLA exam. I ask because when I did the sample exam, it took me close to 4:45~5 hours to get done! I saw some users mentioning that they managed doing sample exams within 3.5 hours - how?? Did you take care of some specific things first and then moved on to other things? The webcast on CLA suggests spending first 15 minutes to understand requirements/etc, which I did but unfortunately I feel like that took away quite sometime from doing rest of the exam.

I know that I have to get used to quick drop, I will keep doing practice using that. If anyone has suggestions or advice on improving exam time, I will highly appreciate them. I am quick at making designs in LabVIEW (I have been programming in LabVIEW for a very long time), but CLA exams seem a lot more time sensitive than my pace during normal LabVIEW work.

Thank you!

-Desi

[crossrulz]

My biggest issue with the CLA exam was trying to figure out how much to program.  You have to remember to just setup the framework and leave comments from there.  I programmed a little too much with the first couple of modules and I almost ran out of time.

[Embedded_Desi]

Thank you - if you don't mind, may I ask how long did you spend just creating the over-all architecture before going inside each specific module design? I'm trying to compare times to see how I can speed up myself so that I am able to at least finish sample tests within 3:45hours.

Also, did you completely create the error handler module functionality or was that also just a framework with comments for a junior engineer to finish it?

Thank you again!

[crossrulz]

I went module by module.  After the first two, I realized I was spending too much time.  So I just started leaving comments like "see this VI over there and program it just like that".  I don't remember my timeline.  That was almost 3 years ago.  I remember I ended up coding most of the error handler.  Otherwise it was setup a state machine and put in what to do in each state.  And also setup the communications between the different modules.  I think my main problem was that I tried to abstract the communication scheme too much.  I should have just make the base communications and left it at that.

[Embedded_Desi]

Thank you Crossrulz...  Your advice is much appreciated and it also helped a bit (especially your suggestion on leaving more comments rather than coding).  I am continuing to practice and hopefully I will have time reduced down to less than 4 hours before the exam.

Thanks a bunch!

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@crossrulz wrote:

I went module by module.  After the first two, I realized I was spending too much time.  So I just started leaving comments like "see this VI over there and program it just like that".  I don't remember my timeline.  That was almost 3 years ago.  I remember I ended up coding most of the error handler.  Otherwise it was setup a state machine and put in what to do in each state.  And also setup the communications between the different modules.  I think my main problem was that I tried to abstract the communication scheme too much.  I should have just make the base communications and left it at that.

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[T.Hamberger]

Hello,

finishing the practise exam in less than 5 hours in the first time is not bad!

Some meachanisms in the practise exam may also be useful in real exam,

e.g. if you learn a proper method to pass data between layers (e.g. by named queues)

you can hope that you can apply that in real exam and save time.

[for not pondering about what is the best solution - you only need a good solution!]

If you still have a lot of practise time available before your exam, you may also let run a stopwatch in parallel to your next practise run and note during your try how much time you spend on each module.

Then you have some data which you can use for optimization, e.g. maybe creating a template vi before for some repeated tasks?

And you get a feeling how much time you can spend on each module/layer -

valuable in real exam to decide whether you are still in time or whether you should not go in further details with module X but proceed with module Y instead

[Embedded_Desi]

Thank you for your suggestions, T.Hamberger! I did start using a timer on my phone to see how much time is taken for each task.  No doubt I am still over-doing the design work which is taking most time (I think I am getting nervous about leaving VIs broken even though the requirements say thats ok).  Hopefully I will have enough practice before the exam to finish enough in time.  Thanks again!