Certification
Sample Exam Solutions for Review
A few things that I think could be improved but overall it seems decent.
- Your main VI has several uninitialized shift registers. You don't really want to remember the Wash Steps, and Elapse and Offset Time from one run to another do you?
- I see many (all?) subVIs are missing VI descriptions, this will cause you to lose points
- I don't think this would cause you to lose points, but why do all your subVIs start with CarWash_ and why don't they have any spaces in the names? It makes it a bit difficult to read, and if you wanted to organize your code you could put them into a library, but I don't really see a need since there are so few.
- A decent number of unneccessary wire bends, and objects on top of wires or other objects. You can run the VI Analyzer to find all them.
- Another VI Analyzer test I think you'd fail is not every VI has at least one comment
- I didn't see any tip strips or dexcriptions for front panel control and indicators
Overall it seems like a pretty good and simple solution. Functionally I think it is great, documentation could use some work, and you may lose a couple points on style but I'd pass you. (full disclosure I've never actually graded a CLD exam, or worked for NI so my endorsement might not mean much when it comes the actual exam)
@Hooovahh wrote:
A few things that I think could be improved but overall it seems decent.
- Your main VI has several uninitialized shift registers. You don't really want to remember the Wash Steps, and Elapse and Offset Time from one run to another do you?
- I see many (all?) subVIs are missing VI descriptions, this will cause you to lose points
- I don't think this would cause you to lose points, but why do all your subVIs start with CarWash_ and why don't they have any spaces in the names? It makes it a bit difficult to read, and if you wanted to organize your code you could put them into a library, but I don't really see a need since there are so few.
- A decent number of unneccessary wire bends, and objects on top of wires or other objects. You can run the VI Analyzer to find all them.
- Another VI Analyzer test I think you'd fail is not every VI has at least one comment
- I didn't see any tip strips or dexcriptions for front panel control and indicators
Overall it seems like a pretty good and simple solution. Functionally I think it is great, documentation could use some work, and you may lose a couple points on style but I'd pass you. (full disclosure I've never actually graded a CLD exam, or worked for NI so my endorsement might not mean much when it comes the actual exam)
I think there was no project associated with this? Get used to using LabVIEW projects! You'll thank yourself later. If I'm not mistaken, the real exam has a project all set up for you.
@littlett wrote:
1. I have uninitialized shift registers.
My first frame is initilization. That frame will initilize all those memories once the program runs. Do I still need to initialize those shift registers outside the while loop? If I don't do that, what issue can there be? Or do you consider it as a good practice so that other people won't think I want to memorize the previous values in those shift registers?
Are we talking best practices or specifically the exam? VI Analyzer tests can find all uninitialized shift registers and then they can be evaluated. I'm unsure if you would lose points. In practice it doesn't really matter as long as you are positive that initialization will take place right away in the state machine. To avoid these questions I just put down a constant. The only exception I have personally is with event registering, because this data type may change, and I've had issues with type def'ing this in the past.
@littlett wrote:
2. I started subVIs with CarWash_.
Hmm, this is a habbit, and here is how it was formed: My programs in my job usually have tests of multiple blocks of a DUT. Each block of the DUT may need a VI to set its voltage. I therefore name them Block1_setVoltage, Block2_setVoltage, ... . Hence, when I call the tests of different blocks in a top level VI for the DUT, those setVoltages will have different names, and won't conflict each other.
I therefore usually name VIs as Block_Function.
What do you suggest my doing?
Again as for the exam it probably doesn't matter, but personally I'd make libraries (or classes) and organize the code that way. Then you can have two "Set Voltage.vi" on disk, but one be part of the "Block 1" library, and another be part of the "Block 2" library. This gives the two VIs different name space and can be loaded at the same time since the name in memory will be something like "Block 1.lvlib:Set Voltage.vi" Then if you want to rename the block you just rename the library, you don't need to rename every VI on disk. This is good for source code control too where renaming a file on disk can be a bit of a pain since both the SCC and LabVIEW need to be made aware of it.
@littlett wrote:
3. there is no space between a VI's name. Well, I guess that's a habbit from text based programming. But I do have a question: if I use space, will there be any plateform based issues? When I want to use spaces, I usually go with "_" . What's a better practice?
I do not know of any operating system that doesn't allow spaces. Again as for the exam you probably won't be marked down, but (again) personally read ability is important, and my brain is used to reading words with spaces between them.
