6602 / Traditional DAQ -- How to ignore gate signal applied externally?

[Philip B]

I'm working with a 6602 card with the SCB-68 connector block, using traditional DAQ in LabVIEW 8.0.1.  I need to reprogram the counters on the 6602 card, but I must work around an existing set of connections imposed by the SCB-68.

Specifically, I have CTR0_OUT (pin 5) hardwired to CTR1_GATE (pin 😎 using the SCB-68.  CTR0 is running a pulse train generation program, as is CTR1.  I want these two pulse trains to run at different frequencies, but CTR1 is being reset by the CTR0 output.  I have tried using the Set Attribute vi, setting gate selection to anything legal (RTSI lines, other PFI lines), but the only way I can get the two counters to run independently is to remove the hard connection between CTR0_out and CTR1_gate.

Is it possible to keep the hard connection, but ignore it somehow?

[Chris_D]

Philip,

You can select any PFI or RTSI as your source or gate for the counter. Using the Counter Gate.vi you can specify the Gate. Doing this you should be able to set a different gate than the default for CTR1_GATE. I have attached an example showing this.

[Philip B]

It appears that Counter Gate.vi is a wrapper around Set Attribute.vi, which I have been using to set the gate.   My problem is that pin 5, CTR1 out, is hard-wired to pin 8, the default gate for CTR1.  The original program had CTR0 running a pulse train generation program, with CTR1 as a retriggerable pulse.  I now want CTR1 to run at a different frequency than CTR0, rather than being entrained to it, so now CTR1 is also running the pulse train generation program.  I want two independent pulse trains, but I can't seem to work around the fact that CTR0 out is electrically connected to CTR1 gate.  I can set the CTR1 gate away from the default, but then CTR1 does not start.  I've tried setting CTR1 gate to 'low', with a negative gate polarity.  I thought this would work, but I've checked the output using an oscilloscope at the SCB-68 breakout box, and the phase of CTR1 is being reset by the output of CTR0.  What I'd like to do is disable the gate input, although I'm pretty sure that isn't possible.  Is there a way to assign the gate so that the hard-wired gate line does not affect the counter?

[Chris_D]

Philip,

I just set up a system similar to yours using a 6602 and a SCB-68 and it actually worked fine for me. I wired CTR0_OUT to CTR1_GATE and ran pulse train programs on each counter. I was able to see each pulse train fine and CTR1 seemed unaffected by CTR0. I used the example I attached above and ran two instances of the VI, one for each counter. I would suggest trying this.

Is there something else in your system that may be affecting the counters that I am not taking into account. Also, what exactly do you mean by you CTR1 being "reset"?

[Philip B]

Can you run CTR1 with a lower frequency than CTR0?  When I do this, say setting CTR0 to 6 kHz and CTR1 to 2 kHz, my CTR1 pulse train runs at 6 kHz instead of 2 kHz.  This behavior is what I was calling 'resetting' -- it resets the phase of CTR1 to 0.

[Chris_D]

Philip,

I was able to test again and did receive results similar to yours. CTR0 does affect CTR1 when the source and gate are connected. The signal that we see from CTR1 and first glance does look okay, which caused me to assume that it was working correctly. After further tests I realized this was not the case and that it does affect the frequency and the pulse width. However, these are expected results. I additionally talked with R&D and we explored some different options to disable the gate, but none were successful. It looks like your only option will be to physically disconnect CTR0_OUT and CTR1_GATE.

[Philip B]

Thanks Chris!  That's the same conclusion I reached, that the wiring must be changed, but I thought I might have missed something.  I can stop banging my head against that wall, now.