Could there be either an error or an indeterminacy (i.e., a "race condition") in the configuration sequence?
It sounds to me like your encoder counter is getting armed and begins to track (but not save) position before the pulse train counter begins generating your acquisition clock.
As soon you arm/start the encoder counter, it starts to "pay attention" to any movements going on and keeps its internal count register updated. It doesn't begin to store buffered positions via DMA until the acquisition clock pulse train starts up, which may occur later.
It sounds to me like you may want to set up like this:
1. Configure both the pulse train counter and the buffered position counter to have triggering enabled. Be sure to feed the same trigger specs i
nto each config chain.
2. Make sure both are armed/started before the trigger signal can be generated. I find it helpful to use the error cluster to enforce dataflow-based sequencing.
If you set up this way, the encoder counter won't "pay attention" to motion until after it sees the triggering signal, so its value will be 0 at the time of the trigger (unless you've explicitly programmed it otherwise). That will also be the same instant the acq. clock pulse train is started.
Note: because there will be a finite time between the trigger and the first active edge of the acq. clock, your first buffered position value may not always be 0. But it'll probably be quite close. If you can live with a non-square acq. clock pulse train, you can reduce this finite time down to the sub-microsecond level, even for slow acquisition rates, by increasing the duty cycle of the the acq clock pulse train.
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