configure 6602 for gated pulse generation-gate configuration problem?

[jonny e]

I want to generate a single triggered pulse on my 6602 board.
I can accomplish this easily if i use counters 0 or 1. But for counters 2-7 I have no luck...I can generate pulses, just not triggered pulses....probably because the board is not properly configured, namely the PFI lines that should serve as the gate.
Note that counters 0 and 1 are the dedicated counters, while 2 thru 7 are shared PFI lines.
I'm using LV 7.1 and the VI called "Generate Delayed Pulse.vi", and select a triggering option of "on rising edge."
I'm sure everything in my hardware is setup correctly since I can get triggered pulses for counters 0 and 1 and can get untriggered (software started) pulses on all other counters.
Any ideas on what I need to do to configure--seems like I just need to configure the PFIs to be the gates,ya?
Thanks in advance for your help.

[sergesl]

Hello Jonny e

Could you maybe attach the VI to the post? I have been looking for the VI you mentionned, but could not find any.

SergeS L.

[jonny e]

Hi-
If you are using Windows, LV, and NI's MAX driver package, you should find the "Generate Delayed Pulse.vi" by going to functions palette--> NI measurements-->Data Acquisition-->Counter-->Generate Delayed Pulse.vi.

If you do not have the software mentioned above, or if you installed LV before MAX, you may not have it on your palate. In the latter case, I recommend clearing all NI software off your machine, then reinstalling LV first, following by MAX.
Let me know if you are able to find the VI.
cheers, jon

[sergesl]

Hello Jonny e

I tried it here and they all triggered without a problem on the rising edge of the gate. I did not have to configure any terminal. I droped the VI on the block diagram, chose the trigger type, specified the delay and width, chose the device and counter and I was ready to go. I am not sure why yours is not triggering. Are you using the 5V power on the board as your source from triggering or are you using some other source? If so, try the 5V from the DAQ.
Let me know...

Serges L.

[jonny e]

Hi serge,
thanks for your post.
i did check the 5V supply when I wasn't seeing what I wanted, and it was fine.
turned out my problem was some configuration conflicts with shared DIO/counter lines.
It was a pain to get my app working in labview, and ended up rewiring some hardware to make things a little smoother.
cheers.

[sergesl]

Hello Jonny e,

If you do not mind, could you describe a little bit what exactely the problem was.

Thanks

Serges L.

[jonny e]

slightly simplifying, my problem was that my VI repeatedly setup counters and DIO lines, one after the other in a loop.
something (i purposely left this vague, because i never found the exact cause), wasn't being configured properly, so it was causing the counter and/or DIO output to flake on me. i'm pretty sure the problem had to do with setting the PFI line for the gate on counter to to be an input. during DIO config, it would change to output (since i always write all my DIO lines). i could've fixed this (i think) with the set_attribute.vi, but found an easier way to fix my problem involving rewiring some hardware.
did you have a specific problem?

[sergesl]

Thanks for your input. It is greatly appreciated.

Serges L.