I use one of the example programms from the Measurement Hardware Driver
Development Kit.
It is the example programm gpct_ex3.cpp.
So it works fine, but now I try to modify it, it should only have a output
signal, when the gate is on high level.
This is what I want to use to create a gated PRF for triggering my radar
system.
However what do I have to modify in which way to get the described
behaviour?
Here is the exsample programm:
***********************************
/*
*  gpct_ex3.cpp
*
*  Continuous Pulses Generation
*
*  Generate continuous pulses using counter 0.  The time the pulse is
asserted is set
*  in the Load B register and the amount of time spent de-asserted is set in
the Load A
*  register.
*
*  Attach an oscilliscope to pin 5 (PFI 36) to observe the generated pulses.
*/
#include "stdio.h"
#include "osiBus.h"
#include "tTIO.h"
void test(iBus *bus);
void initMite(iBus *bus);
int main()
{
 iBus* bus;
 //Each PCI card has an identifying 32bit PCI ID number.
 //0x10930000 is the manufacturer ID number for all National Instruments
cards
 //0x00001310 is the device ID number for the PCI-6602
 //0x00001360 is the device ID number for the PXI-6602
 //0x00002DB0 is the device ID number for the PCI-6608
 //0x00002CC0 is the device ID number for the PXI-6608
 bus = acquireBoard(0x10931310);
 if(bus == NULL){
  printf("Error accessing the PCI device.  Exiting.\n");
  return 1;
 }
 //Intitialise Mite Chip.
 initMite(bus);
 //Calling test function
 test(bus);
 releaseBoard(bus);
 return 0;
}
//Tell the MITE to link the  BAR1 address to the DAQ Board
//You must initialize the MITE before you write to the rest of the PCI board
void initMite(iBus *bus)
{
 tAddressSpace  Bar0;
 u32 physicalBar1;
 //Skip MITE initialization for PCMCIA boards
 //(which do not have a MITE DMA controller)
 if(!bus->get(kIsPciPxiBus,0)) return;
 Bar0 = bus->createAddressSpace(kPCI_BAR0);
 //Get the physical address of the DAQ board
 physicalBar1 = bus->get(kBusAddressPhysical,kPCI_BAR1);
 // ***** 6602/6608 specific MITE initialization *****
 // Hit the IO Window Base/Size Register 1 (IOWBSR1) in the MITE.  We set
the
 // address, enable the window and set the size of the window:
 Bar0.write32(0xC4, (physicalBar1 & 0xffffff00L) | 0x8C);
 // Write to the IO Window Control Register 1 (IOWCR1) to make the IO window
 // go to RAM memory space instead of the config space
 Bar0.write32(0xF4, 0);
 // ***** End of 6602/6608 specific code *****
 bus->destroyAddressSpace(Bar0);
}
void test(iBus *bus)
{
 tAddressSpace  cardSpace;
 tTIO *board;
 cardSpace = bus->createAddressSpace(kPCI_BAR1);
 board = new tTIO(cardSpace);
 //Reset
 board->G01_Joint_Reset_Register.writeG0_Reset(1);
 //load pulsewidths into load registers A and B
 //A is the low count
 //B is the high count
 board->G0_Load_A_Registers.writeG0_Load_A(0x00001000);
 board->G0_Load_B_Registers.writeG0_Load_B(0x00002000);
 board->G0_Command_Register.writeG0_Load(1);
 //reload from the other load register on each terminal count
 board->G0_Mode_Register.writeG0_Reload_Source_Switching(1);
 board->G0_Mode_Register.writeG0_Loading_On_TC(1);
 //set source to internal timebase 3, the 80MHz internal clock
 board->G0_Input_Select_Register.writeG0_Source_Select(30);
// **** this should be changed? *****
 //set gate to disabled gating
 board->G0_Input_Select_Register.writeG0_Gate_Select(30); //Logic Low
 board->G0_Mode_Register.writeG0_Gate_Polarity(1);
 board->G0_Command_Register.writeG0_Synchronized_Gate(1);
 board->G0_Mode_Register.writeG0_Trigger_Mode_For_Edge_Gate(3);
 board->G0_Mode_Register.writeG0_Gating_Mode(1);
// **** this should be changed? *****
 //set counting direction to down
 board->G0_Command_Register.writeG0_Up_Down(0);
 //set PFI line to output
 board->IO_Pin_36_37_Configuration_Register.writeIO_Pin_36_Select(1);
 board->G0_Mode_Register.writeG0_Output_Mode(10);
 //arm counter
 printf("counter value is 0x%08lx\n",
   board->G0_Save_Registers.readRegister());
 board->G0_Command_Register.writeG0_Arm(1);
 delete board;
 bus->destroyAddressSpace(cardSpace);
}
**************************************
Thanks
Mario Behn