markwysong - 6602 counters follow-up..polarity of pulses and delay?

[Jay Gibson]

hi,
you kindly answered by labview question regarding the generation of pulses with no delay to the first pulse. you suggested setting the polarity to low. i think i tried doing this, and the baseline became high. in effect, i still have my problem because no transition occurs with delay zero. the pulse event, and transition still occurs after phase 1. is there a way to make the baseline low, and at the same time, make polarity of the pulses low so that the delay is high, and a transition occurs with zero delay?

thank you

[markwysong]

After I made my post, I began to think about that exact scenario. I remember setting the pulse low, and it did set the counter output high.

If you change your phase 1 to 0 and then set your phase 2 to 10 ms, you'll never get the pulse to go low again...there's no duty cycle. (Or you might get a very, very short low signal, maybe not enough for your instrument to read properly.)

Do you have analog outputs at your disposal?

Mark

[markwysong]

Jay,

One more thing to try. I found a VI in the counter->advanced called Counter Set Attribute. One of the attributes, 13, lets you set the count of the counter before it is triggered. If you set your pulse to 50% duty cycle, positive polarity, and then call this VI and set the count to 100,000 (if you are using the 20MHz internal clock) (100,000 / 20,000,000 cts per sec is 5 milliseconds, or the length of phase 1) then when the counter is triggered, it is possible to skip the first phase 1. You must call this VI BEFORE the Counter Start VI.

I've not tried this before, so I'm grasping. Conceptually it should work, but it'd be easy to try it.

Mark