pci 6602 external clock

[wa4557]

Hello I'm a little bit a newb concerning the PCI-6602, and I need somenones help. I have a APD which delivers signals I want to count while an external gate is high. My code so far (this is just pseudo code since I have a wrapper in python): I have connected the signal I want to count to the PFI39 and the Gate to Gate - ctr7

DAQmxCreateTask('', task)

DAQmxCreateCIPulseWidthChan( task, "/dev1/ctr7", '', 0, MaxCounts*DutyCycle/f, DAQmx_Val_Ticks, DAQmx_Val_Rising)

DAQmxSetCIPulseWidthTerm( task, "/dev1/ctr7", "" ) 
DAQmxSetCICtrTimebaseSrc( task, "/dev1/ctr7", "/Dev1/PFI39" ) )

DAQmxSetCIDupCountPrevent(task, "/dev1/ctr7", True  )

DAQmxSetReadRelativeTo(task DAQmx_Val_CurrReadPos) )

DAQmxCfgImplicitTiming( task, DAQmx_Val_FiniteSamps, 1000)

DAQmxSetReadOffset(task, 0)

DAQmxSetReadOverWrite(task, DAQmx_Val_DoNotOverwriteUnreadSamps)

DAQmxStartTask(task)

DAQmxReadCounterU32(task
, 1000
, 0.008
, 285099872
, 1000
, ctypes.byref(self._CINread), None) 

DAQmxStopTask(task)

this is not actual code, this is just copied from a python file - thus not C Synthax, but the functions should be ok.

If I set the Gate to low however I still get counts, although the Gate is low. Can anyone help me? Did I connect the gate / src to the correct pins?

[John_P1]

The behavior you describe doesn't make sense to me.  Having configured implicit timing, you would only expect a single sample every time the gate signal goes from high to low.  Each buffered sample would indicate the number of source ticks that occurred between sequential rising and falling edges of the gate signal.  Is this the behavior that you intended?  If the gate is just staying low one would expect the read call to timeout since no new samples would be available.

Does DAQmxSetCIPulseWidthTerm( task, "/dev1/ctr7", "" )  not return an error?  On my simulated 6602 as well as my real PCIe-6351 I get error -200254 indicating that an empty string is not a valid terminal (although I know for a fact that this does work for counter output terminals, I don't think it makes much sense for the input terminal on a pulse width task).  In any case, you should just specify the PFI line to which you have connected your gate signal.

Best Regards,