Hello everyone,
I am using a pci6602 to derive a few clocks from one master clock. For our purposes we need to be able to start/stop the pulse trains a few times during a run. This is not a problem, because when I apply a gate, I can simply inhibit the counting. However, I would like to be able to start/stop on two different signal. With an outside flipflop this is possible, but I read in the register level manual that using the second gate would also be an option. But while the hardware seems to support this feature, the NIDAQ library only enables the second gate in two signal edge separation. Does anyone know of a way to flip the appropriate bit in the card from within the NIDAQ framework?
regards,
Dries